A hybrid simulation platform for learning microprocessors

Abstract

Modern engineering applications are based on microprocessors and microcontrollers. Thus, the microprocessor (uP) architecture constitutes a core course component in engineering education. Many technologies have been used by the Universities in the past 30 years for learning uPs. In the 1980s, hardware platforms have been used (e.g., MPF‐I) for learning assembly programming in hexadecimal mode of popular microprocessor models. The above platforms have been replaced by software simulators where the uP components are represented by visual objects. The software based approaches have lack of uP architecture customization and are limited only in assembly programming. On the other hand, the existing hardware based tools are low level and very complicated. Thus, the students do not work on uP design and assembly language development. In this paper, a novel hybrid simulator platform which changes the educational point of view regarding the uP learning methodology is presented. The proposed hybrid simulation platform (HSP) consists of hardware components which represent the uP architectural units and software components for system operation and administration. Using the HSP, students freely select the uP hardware based components and build their own architecture. On the other hand, professors can create educational scenarios with customizable experimental architectures.

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