A Hybrid Approach to Design Key Generator of Cryptosystem

Mohammed, Nada Qasim; Hussein, Qasim Mohammed; Sana, Ahmed M.; Khalil, Layth A.

doi:10.1166/jctn.2019.7985

Cited by 4 publications

(2 citation statements)

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“…One efficient way to achieve this is cryptography, in which various algorithms that vary in their security are proposed. An algorithm of cryptography, which has not yet been found a way to break it, is the AES algorithm [3]. However, the AES algorithm has high computational power to achieve its operations because of the large number of rounds that are used, and the need for more time to encrypt the data [4,5].…”

Section: Introductionmentioning

confidence: 99%

Design and Implementation of True Parallelism Quad-Engine Cybersecurity Architecture on FPGA

Mohammed¹,

Amir²,

Salih³

et al. 2022

IJACSA

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Applications, such as Internet of Things, deal with huge amount of transmitted, processed and stored images that required a high computing capability. Therefore, there is a need a computing architecture that contribute in increasing the throughput by exploiting modern technologies in both spatial and temporal parallelisms. This paper conducts a parallel quadengine cybersecurity architecture with new configuration to increase the throughput. using DE1-SoC and Neek FPGA boards and HDL. In this architecture, each engine operates with 600MHz maximum frequency. Each image is divided into four parts of equal size and each part processed by single engine concurrently to achieve spatial parallelism. Internally, engine is handling image's part in temporal parallelism and deep pipelining abstraction applied in every engine by dividing it to sub modules to execute different tasks concurrently. All data processed in engines is encrypted via AES algorithm that implemented as a significant part of engine architecture. The obtained results increased the throughput by four times, with 153,600Mbps, that make this computing architecture efficient and suitable for fast applications such as IoT and cybersecurity level of processing.

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Section: Introductionmentioning

confidence: 99%

Design and Implementation of True Parallelism Quad-Engine Cybersecurity Architecture on FPGA

Mohammed¹,

Amir²,

Salih³

et al. 2022

IJACSA

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“…There will be a hug exchange of data, including personal data and many data that need to be confidential. So, data security is an important challenge that should be taking a priority work to secure these data by encrypted them [2]. Since, the devices used in IoT are constrained devices (processing, memory, and power) [3], therefore, it is preferable to use encryption systems with lower computational power, less amount of storage in addition to less energy consumption.…”

Section: Introductionmentioning

confidence: 99%

Dynamic keys generation for internet of things

Guma'a

Hussein

Al-Ta'i

2020

IJEECS

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<span>In several aspects, interest in IoT has become considerable by researchers and academics in recent years. Data security becomes one of the important challenges facing development of IoT environment. Many algorithms were proposed to secure the IoT applications. The traditional public key cryptographic are inappropriate because it requires high computational. Therefore, lattice-based public-key cryptosystem (LB-PKC) is a favorable technique for IoT security. NTRU is one of a LB-PKC that based on truncated polynomial ring, it has good features, which make it to be an effective alternative to the RSA and ECC algorithms. But, there is LLL algorithm can success to attack it under certain conditions. This paper proposes modifications to NTRU public key cryptosystem to be secure against the lattice-based attack by using LLL algorithm, as well as a method for generating a new keys sequence dynamically. The results from simulations show that the performance of these modifications gives more secure from NTRU. </span>

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