A Highly Linear Temperature Sensor Operating up to 600°C in a 4H-SiC CMOS Technology

Mo, Jiarui; Li, Jinglin; Zhang, Yaqian; Romijn, Joost; May, Alexander; Erlbacher, Tobias; Zhang, Kouchi; Vollebregt, Sten

doi:10.1109/led.2023.3268334

Cited by 16 publications

(3 citation statements)

References 17 publications

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“…reduced by up to ∼50% [6]. In spite of the significant benefit to the power system with SiC MOSFETs, there exists a tradeoff between R on and BV of the conventional planar gate vertical SiC MOSFETs (CON-MOS), which is indicated by Baliga figure of merit (BFOM = 4BV 2 /R on,sp ) [7][8][9][10]. R on is dominated by the epitaxial layer resistance and JFET component (R JFET ) at higher voltages due to higher resistivity or lower background carrier concentration in the epitaxial layer [8][9][10][11].…”

Section: Introductionmentioning

confidence: 99%

“…In spite of the significant benefit to the power system with SiC MOSFETs, there exists a tradeoff between R on and BV of the conventional planar gate vertical SiC MOSFETs (CON-MOS), which is indicated by Baliga figure of merit (BFOM = 4BV 2 /R on,sp ) [7][8][9][10]. R on is dominated by the epitaxial layer resistance and JFET component (R JFET ) at higher voltages due to higher resistivity or lower background carrier concentration in the epitaxial layer [8][9][10][11]. In addition, the minimization of the reverse transfer capacitance (C rss or C GD ) and gate-to-drain charge (Q GD ) of the devices is essential for improving high frequency performance because they are dominant factors that determine switching energy loss [12].…”

Section: Introductionmentioning

confidence: 99%

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Simultaneous improvement of high-frequency and Baliga figures of merit of 1.7 kV 4H-SiC MOSFET with retrograded JFET doping

Wang,

Hua,

Zheng

et al. 2024

J. Phys. D: Appl. Phys.

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The 1.7-kV 4H-SiC MOSFET which features optimized retrograded-profile ion implantation in the JFET regions (RG-MOS) is proposed and fabricated on the 4-inch wafers. The measured results quantify the benefits of the RG-MOS structure: simultaneous improvement in high-frequency figures of merit (HF-FOM) (Ron×CGD) by 1.5×, HF-FOM (Ron×QGD) by 1.5× and Baliga figure of merit (BFOM = 4BV2/Ron,sp) by 1.6× compared with the conventional MOSFET (CON-MOS). Unlike other reported complicated structures which need high-precise fabricating process, the proposed RG-MOS structure is compatible with the prior planar 4H-SiC MOSFET process, and is favorable for large-scale production.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Simultaneous improvement of high-frequency and Baliga figures of merit of 1.7 kV 4H-SiC MOSFET with retrograded JFET doping

Wang,

Hua,

Zheng

et al. 2024

J. Phys. D: Appl. Phys.

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“…All the 4H-SiC-based proposed temperature sensors transduce temperature in electrical quantities, either through the difference of Gate Source Voltages (

) between two MOSFETs [ 11 ], or through the difference of diode forward voltages [ 2 , 3 , 9 , 13 , 14 ]. However, 4H-SiC diodes with good performances have vertical structures and they are incompatible with VLSI circuits, whereas, although MOSFETs can be used, they need an integrated circuit in order to read out the voltage-temperature signal.…”

Section: Introductionmentioning

confidence: 99%

A 4H-SiC CMOS Oscillator-Based Temperature Sensor Operating from 298 K up to 573 K

Rinaldi,

Liguori,

May

et al. 2023

Sensors

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In this paper, we propose a temperature sensor based on a 4H-SiC CMOS oscillator circuit and that is able to operate in the temperature range between 298 K and 573 K. The circuit is developed on Fraunhofer IISB’s 2 μm 4H-SiC CMOS technology and is designed for a bias voltage of 20 V and an oscillation frequency of 90 kHz at room temperature. The possibility to relate the absolute temperature with the oscillation frequency is due to the temperature dependency of the threshold voltage and of the channel mobility of the transistors. An analytical model of the frequency-temperature dependency has been developed and is used as a starting point for the design of the circuit. Once the circuit has been designed, numerical simulations are performed with the Verilog-A BSIM4SiC model, which has been opportunely tuned on Fraunhofer IISB’s 2 μm 4H-SiC CMOS technology, and their results showed almost linear frequency-temperature characteristics with a coefficient of determination that was higher than 0.9681 for all of the bias conditions, whose maximum is 0.9992 at a VDD = 12.5 V. Moreover, we considered the effects of the fabrication process through a Monte Carlo analysis, where we varied the threshold voltage and the channel mobility with different values of the Gaussian distribution variance. For example, at VDD = 20 V, a deviation of 17.4% from the nominal characteristic is obtained for a Gaussian distribution variance of 20%. Finally, we applied the one-point calibration procedure, and temperature errors of +8.8 K and −5.8 K were observed at VDD = 15 V.

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Design and Analysis of a Voltage Schmitt Trigger in 4H-SiC CMOS Technology

Rinaldi,

Liguori,

Rubino

et al. 2023

Lecture Notes in Electrical Engineering

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A Highly Linear Temperature Sensor Operating up to 600°C in a 4H-SiC CMOS Technology

Cited by 16 publications

References 17 publications

Simultaneous improvement of high-frequency and Baliga figures of merit of 1.7 kV 4H-SiC MOSFET with retrograded JFET doping

Simultaneous improvement of high-frequency and Baliga figures of merit of 1.7 kV 4H-SiC MOSFET with retrograded JFET doping

A 4H-SiC CMOS Oscillator-Based Temperature Sensor Operating from 298 K up to 573 K

Design and Analysis of a Voltage Schmitt Trigger in 4H-SiC CMOS Technology

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