A high-throughput ASIC processor for 8×8 transform coding in H.264/AVC

Michell, J.A.; Solana, J.M.; Ruiz, Gustavo A.

doi:10.1016/j.image.2011.01.001

Cited by 5 publications

(5 citation statements)

References 22 publications

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“…However, the quantization and rescaling are computed using only one multiplier each and they are performed at the pace demanded by the entropy coder. In a previous work (Michell et al, 2011), we described a parallel architecture capable of processing 8×8 blocks without interruption with a bit-depth fixed to 8 bit. The latency of 38 clock cycles is achieved by implementing in a pipeline scheme each module used in the transform coding.…”

Section: Asic Implementation and Comparisonsmentioning

confidence: 99%

Variable Bit-Depth Processor for 8×8 Transform and Quantization Coding in H.264/AVC

Ruiz¹,

Michell²

2011

Recent Advances on Video Coding

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Section: Asic Implementation and Comparisonsmentioning

confidence: 99%

Variable Bit-Depth Processor for 8×8 Transform and Quantization Coding in H.264/AVC

Ruiz¹,

Michell²

2011

Recent Advances on Video Coding

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“…In a previous work (Michell et al, 2011), we described a parallel architecture capable of processing 8×8 blocks without interruption with a bit-depth fixed to 8 bit. The latency of 38 clock cycles is achieved by implementing in a pipeline scheme each module used in the transform coding.…”

Section: Asic Implementation and Comparisonsmentioning

confidence: 99%

Recent Advances on Video Coding

2011

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Dr. Javier (Javi) Del Ser was born in Barakaldo (Spain) in 1979. He joined the Faculty of Engineering of the University of the Basque Country (Spain) to study Electrical Engineering, obtaining his combined B.S. and M.S. degree. After finishing this degree, he became a recipient of the Fundacion de Centros Tecnologicos Inaki Goenaga doctoral grant, which allowed him to start working toward his Ph.D. degree CEIT, San Sebastian, in November 2003. In October 2006 he achieved the Ph.D. degree (cum laude) in Electrical Engineering. In addition, he was a teaching assistant at TECNUN (University of Navarra), a visiting scholar at University of Delaware (USA) and an assistant professor and researcher at the University of Mondragon, Spain. Currently he is a senior research scientist and project leader at the Telecom Unit of TECNALIA RESEARCH & INNOVATION, involved in the organization of more than 25 national and international conferences. He is a member of the IEEE Communications, Signal Processing, Computational Intelligence and Information Theory societies.

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“…It achieves substantially better coding efficiency compared to its predecessors by means of a larger number of coding tools, such as new prediction modes, larger transform sizes and new picture partitioning, which require a much higher computational effort with respect to the previous standards [3][4][5][6]. As with previous standards, custom hardware implementations can accelerate some operations [7][8][9][10]. Such hardware is typically integrated in many devices, including cameras and mobile phones.…”

Section: Introductionmentioning

confidence: 99%