A high-speed small RSA encryption LSI with low power dissipation

Satoh, Akashi; Kobayashi, Y.; Niijima, H.; Ooba, Nobuyuki; Munetoh, Seiji; Sone, S.

doi:10.1007/bfb0030419

Cited by 9 publications

(8 citation statements)

References 16 publications

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“…Goodman and Chandrakasan [12] proposed a coarse-grain reconfigurable array in which the carry-lookahead network is emulated by a serial chain previously proposed by Satoh et al [24]. This reconfigurable array is very coarse grain, in the sense that the array supports only three configurations.…”

Section: Figure 1: Carry-lookahead Network On Xilinxmentioning

confidence: 97%

“…Thus, software-based implementations are typically slow. For this reason, cryptography applications have been traditionally implemented in Application-Specific Integrated Circuits (ASIC) [24], or in hardwired-assists in Application-Specific Instruction set Processors (ASIP) [18]. Other solutions rely on coprocessors to accelerate long-integer arithmetic operations.…”

Section: Introductionmentioning

confidence: 99%

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Reconfigurable solutions for very-long arithmetic with applications in cryptography

Chu

Miller

Sima

2008

Proceedings of the 18th ACM Great Lakes Symposium on VLSI

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We present a cryptography-oriented reconfigurable array called CryptoRA that efficiently supports very long-integer addition and subtraction. We first describe the CryptoRA architecture and show that extending the dedicated carry chains of modern FPGAs over the orthogonal direction, followed by merging two FPGA columns to create computing tiles that support both generate and propagate signals of a carry-lookahead network, provides a reduction in operation latency. Then, we show that splitting a tile's Look-Up Table into two halves provides additional benefits in terms of latency and flexibility in using the dedicated generate and propagate chains. According to our estimations, long-integer addition widely used in cryptography is more than 22% faster on CryptoRA than on Virtex-II Pro FPGA. This improvement has a large positive impact on implementing cryptography applications in embedded environments.

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Section: Figure 1: Carry-lookahead Network On Xilinxmentioning

confidence: 97%

Section: Introductionmentioning

confidence: 99%

Reconfigurable solutions for very-long arithmetic with applications in cryptography

Chu

Miller

Sima

2008

Proceedings of the 18th ACM Great Lakes Symposium on VLSI

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“…For these reasons, the demand for high-performance cryptographic hardware is growing. Since IBM developed its first cryptographic chip in 1997 [5], we have introduced many prototypes and products: a fingerprint identification unit [6], a secure socket layer (SSL) accelerator board, a cryptographic hardware IP evaluation board, a security accelerator for the PowerPC processor, and a secure hard disk drive.…”

Section: Optimized Cryptographic Circuitsmentioning

confidence: 99%

On-demand design service innovations

et al. 2004

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Offering design services for manufacturers of embedded devices has become a very important business, one in which the three leading customer requirements are time to market, integration of leading-edge technologies, and cost reduction; in short, ondemand design services. In this paper, we discuss on-demand design service innovations of several types. First, we discuss our unique field-programmable gate array (FPGA)-based system emulation tool. Although embedded systems comprise a wide range of technologies and components, some important technologies and components are common to most embedded systems. Security and communications are two of these, and we have developed offerings in these areas as well. For security, we developed scalable intellectual property macros to meet the requirements for many kinds of cryptographic circuits. These macros can satisfy specific requirements-performance, size of the silicon area, and power dissipation-for many kinds of embedded systems. For communications, we developed an autonomic network configuration tool which allows an end user to avoid the potential frustration of setting up a network connection and which also automatically performs network security tasks.

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“…The number of read and write ports within the register file is dictated by the requirement to be able to perform single cycle, two operand instructions which generate a writeback value. In certain cases two write ports could have proved The fast adder unit is capable of adding/subtracting two n-bit (8 ≤ n ≤ 1024) operands in four cycles using the hybrid carry-bypass and carry-select technique described in [7] ( Figure 5), and optimized for a bitsliced implementation. The unit features a local register to store the previous sum result, a feature that is used in modular addition/subtraction and inversion routines.…”

Section: Reconfigurable Datapathmentioning

confidence: 99%

“…Full-adder with propagate output corresponding to 5. Modified bitsliced carry-bypass/select adder [7].…”

Section: Reconfigurable Datapathmentioning

confidence: 99%

An Energy Efficient Reconfigurable Public-Key Cryptography Processor Architecture

Goodman

Chandrakasan

2000

Cryptographic Hardware and Embedded Systems — CHES 2000

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The ever increasing demand for security in portable, energyconstrained environments that lack a coherent security architecture has resulted in the need to provide energy efficient hardware that is algorithm agile. We demonstrate the feasibility of utilizing domain-specific reconfigurable processing for asymmetric cryptographic applications in order to satisfy these constraints. An architecture is proposed that is capable of implementing a full suite of finite field arithmetic over the integers modulo-N , binary Galois Fields, and non-supersingular elliptic curves over GF (2 n), with operands ranging in size from 8 to 1024 bits. The performance and energy efficiency of the architecture are estimated via simulation and compared to existing solutions (e.g., software and FPGA's), yielding approximately two orders of magnitude reduction in energy consumption at comparable levels of performance and flexibility.

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A high-speed small RSA encryption LSI with low power dissipation

Cited by 9 publications

References 16 publications

Reconfigurable solutions for very-long arithmetic with applications in cryptography

Reconfigurable solutions for very-long arithmetic with applications in cryptography

On-demand design service innovations

An Energy Efficient Reconfigurable Public-Key Cryptography Processor Architecture

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