Proceedings of INFOCOM '97
DOI: 10.1109/infcom.1997.635110
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A high-performance OC-12/OC-48 queue design prototype for input-buffered ATM switches

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Cited by 40 publications
(22 citation statements)
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“…Switching matrix scheduling algorithms have been extensively studied for electronic switches [17]- [19]. However, they are similar to the burst-scheduling algorithms in the OBS routers only in a sense that the goals of the both types of scheduling algorithms are to obtain the switching matrix configurations such that input traffic can be efficiently sent to the desired outputs.…”
Section: Background On Scheduling Algorithmsmentioning
confidence: 99%
“…Switching matrix scheduling algorithms have been extensively studied for electronic switches [17]- [19]. However, they are similar to the burst-scheduling algorithms in the OBS routers only in a sense that the goals of the both types of scheduling algorithms are to obtain the switching matrix configurations such that input traffic can be efficiently sent to the desired outputs.…”
Section: Background On Scheduling Algorithmsmentioning
confidence: 99%
“…A number of CM-SAs for IQ switch architectures have appeared in the technical literature; see, e.g., [2]- [4], [9] [11]- [16]. In this paper, we consider six proposals, namely, three optimal algorithms MWM-QL (MWM with queue lengths as weights), MWM-CA (MWM with cell ages as weights), MSM (maximum size matching), and three heuristics, iLQF [22], iSLIP [23], and iOCF [22].…”
Section: B Considered Cell-mode Scheduling Algorithms (Cm-sas)mentioning
confidence: 99%
“…Most of the implemented high-speed IQ switches internally operate on fixed-size data units (cells): the Lucent GRF [5], the Cisco GSR [6], the Tiny-Tera [7], the AN2/DEC [3], [8], the iPoint [9], and the MGR/BBN [10].…”
mentioning
confidence: 99%
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“…Researchers have proposed several good switch scheduling algorithms, such as iterative SLIP (iSLIP), 7 iterative longest queue first (iLQF), 8 reservation with preemption and acknowledgment (RPA), 9 and matrix unit cell scheduler (MUCS) 10 With centralized implementations, the runtime of these algorithms is O(N 2 ) or more. But by adopting parallelism and pipelining (which means adding spatial complexity in hardware) these algorithms can considerably reduce their time complexity.…”
mentioning
confidence: 99%