A High-Performance Multimem SHA-256 Accelerator for Society 5.0

Abstract

The development of a low-cost high-performance secure hash algorithm (SHA)-256 accelerator has recently received extensive interest because SHA-256 is important in widespread applications, such as cryptocurrencies, data security, data integrity, and digital signatures. Unfortunately, most current researches have focused on the performance of the SHA-256 accelerator but not on a system level, in which the data transfer between the external memory and accelerator occupies a large time fraction. In this paper, we solve the state-of-art problem with a novel SHA-256 architecture named the multimem SHA-256 accelerator that achieves high performance at the system on chip (SoC) level. Notably, our accelerator employs three novel techniques, the pipelined arithmetic logic unit (ALU), multimem processing element (PE), and shift buffer in shift buffer out (SBi-SBo), to reduce the critical path delay and significantly increase the processing rate. Experiments on a field-programmable gate array (FPGA) and an applicationspecific integrated circuit (ASIC) show that the proposed accelerator achieves significantly better processing rate and hardware efficiency than previous works. The accelerator accuracy is verified on a real hardware platform (FPGA ZCU102). The accelerator is synthesized and laid out with 180 nm complementary metal oxide semiconductor (CMOS) technology with a chip sized 8.5mm × 8.5mm, consumes 1.86 W, and provides a maximum processing rate of 40.96 Gbps at 80 MHz and 1.8 V. With FPGA Xilinx 16 nm FinFET technology, the accelerator processing rate is as high as 284 Gbps.

BCA: A 530-mW Multicore Blockchain Accelerator for Power-Constrained Devices in Securing Decentralized Networks

“…We developed the BCA to achieve this aim. In [28], we developed an SoC-compatible SHA-256 accelerator with a high computation rate and efficient data transfer rate. However, the developed accelerator attempts to compute the SHA-256 hash function for general purposes.…”

“…However, the developed accelerator attempts to compute the SHA-256 hash function for general purposes. There are still three main problems when applying the accelerator in [28] for computing double SHA-256. First, multiple processing elements (PEs) are required to compute the double SHA-256 algorithm.…”

“…Second, the size of local memories is too large, while the number of trials on hash calculation per configuration time is limited. Third, the architecture in [28] requires the data transfer between the accelerator and the external memory for all hash functions to be calculated by the accelerator, which raises the data transfer rate bottleneck issue. This issue obviates the usefulness of further improving the processing rate of the accelerator.…”

“…In this study, we solve the aforementioned problems in [28] by developing a novel BCA architecture for accelerating the double SHA-256 in the BC mining process. The name "BCA" is used owing to its purpose of accelerating the mining process of blockchain networks, even though its function is to compute double SHA-256.…”

“…The D-PEs work in parallel as multiple independent processing cores (multicore). We modify the multiple local memory structure in [28] to significantly reduce the memory size. In addition, we implement the NAU mechanism to eliminate the data transfer rate bottleneck issue.…”