A high performance liner for copper damascene interconnects

Abstract

We describe a liner' for Cu-Damascene multilevcl ULSI interconnects, which satisfies all the important requirements for a high performance and reliable Cu interconnect technology. This liner is implemented in the first manufacturing process to produce and ship CMOS chips with Cu interconnects'. The liner is a bilayer from a family of hcp/bcc-TaN followed by bcc-Ta (a-Ta), deposited sequentially in a single PVD chamber from a pure Ta target, using Ar and Nz sputtering gases. This bilayer simultaneously maximizes adhesion to the interlevel dielectric and the Cu fill, and has very low in-plane resistivity (-30-60 M-cm, depending on TaN/Ta thicknesses). These qualities produce high-yield, highly reliable, and electromigration-redundant Cu interconnects. Introduction Many liners have been implemented in experimental Cu integration schemes. The family of Ta-based compounds has emerged prominently. Ta (P-phase) was first shown to be an excellent Cu diffusion barrier in 1986 by Hu et d 3 . It was since found4 that a low background level (e.g. < l o 7 Torr) of O2 or H 2 0 was responsible for decreasing Cu diffusivity through Ta grain boundaries. (Presumably, current studies that fmd reduced Ta barrier performance stem fiom the low base pressures of modem PVD systems, and could be helped by a controlled leak of 02.) Such a P-Ta(0) barrier was used in the first multilevel Cu integration in polyimide ILD', due to its optimal adhesion to the materials used6. For dualDamascene integration in Si022 however (see fig. 1 .), Ta and Ta2N7 lack adequate adhesion to SO2, whereas TaN/SiO2 adhesion is excellent ( fig. 2). On the other hand, Cu/TaN adhesion is relatively poor. In fact, the liner/ILD and Cdliner adhesion have conflicting dependencies on N% in TaN,. We believe it is essential to maximize adhesion at all interfaces, especially the Cu/liner one. This is both to resist delamination during processing or thermal stressing, and for electromigration resistance in fine Cu lines, where interfacial and surface migration play a large role*. As confirmed elsewhere', Cu E-M lifetimes are lower when against a TaN vs. a Ta liner. Unlike CdTaN, /W, and /TiN, the CdTa interface exhibits high wetting" and atomic-scale mixing". This occurs without alloying, which would consume Cu atoms. The Cu/Ta interface is thus uniquely optimal among the commonly studied candidates.Another essential liner quality which has not been addressed generally elsewhere and which is lacking in TaN or TiN, is the capacity for current-strapping (electromigration rcdundancy) by a suitably thin liner. In thc event of Cu defects or elcctromigration wearout, a propcr liner should prevent or dclay open-circuit failurc, cvcn at maximum rated currcnt concentrated in the liner. Such rcdundancy is achieved by the TiAh alloy ovedunder cladding in our AI(Cu) interconnects, and is a reliability requirement for our Cu interconnccts as well. DiscussiodData Our evaluation factors for designing a Cu Damascenc liner are shown in Table I, with results from screening of many candidat...

Statistical Analysis of Electromigration Lifetimes and Void Evolution for Cu Interconnects

“…Which crystal structure forms depends significantly on processing conditions. While most PVD processes lead to β-Ta films, especially when the film is deposited onto a dielectric material, careful adjustments of processing parameters as well as the use of a TaN underlayer or a CVD process were observed to produce the low resistivity α-Ta [Edelstein 2001, Donohue 2002, Hecker 2002, Demuynck 2003]. Different crystal structures within one film were found as well [Lee 1999, Kwon 2000.…”

Synthesis and in situ characterization of low-resistivity TaNx films by remote plasma atomic layer deposition

“…TaN is considered as a candidate to replace the poly-Si gate in metal-oxidesemiconductor field effect transistors, 1 as metal electrode in high-density three dimensional ͑3D͒ capacitors, 2 and as Cu diffusion barrier [3][4][5] and possible liner material for interconnect technology. 6,7 In addition to a high level of growth control, several applications require conformal deposition in high-aspect ratio structures, which is a requirement beyond reach of current physical vapor deposition ͑PVD͒ techniques. Due to its layer-by-layer growth, atomic layer deposition ͑ALD͒ is believed to be the method of choice for deposition in demanding 3D features.…”

Comparative Study on Cu-CVD Nucleation Using β-diketonato and Amidinato Precursors for Sub-10-nm-Thick Continuous Film Growth

“…Such screening has already been carried out, resulting in the following candidate materials: Ru, [29][30][31][32][33] Co, [19][20][21][22][23][24] and Ta. [16][17][18] Among these elements, the underlayer material that is most favorable in terms of Cu nucleation should be selected based on solution (I); i.e., it should provide a small γ int and a small θ. Because γ int is affected by the matching of the crystal structure and lattice constant between Cu and the underlayer, a small γ int can be achieved by employing an underlayer with a face-centered-cubic (fcc) or hexagonal-close-packed (hcp) lattice structure (which is similar to the fcc crystal structure of Cu), with an atomic radii that is similar to that of Cu (1.28 Å).…”

“…Kim et al succeeded in forming ultra-thin (< 9-nm-thick) continuous Cu films, employing oxynitiride during CVD growth of Cu to lower the surface energy of the films, together with a subsequent reduction step. 15 However, this approach is not compatible with Ta [16][17][18] -and Co [19][20][21][22][23][24] -based underlayers due to oxidation during CuON deposition, which leads to poor adhesion between the Cu layer and the underlayers, as TaO x and CoO x were not reduced during the process. Au et al succeeded in filling narrow trenches (∼17 nm-wide) with Cu, employing iodine-catalyzed CVD of Cu onto Mn 4 N underlayer.…”