2023
DOI: 10.1007/978-3-031-40003-2_3
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A High-Performance Hardware Implementation of the LESS Digital Signature Scheme

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Cited by 1 publication
(2 citation statements)
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“…These large keys consume more storage space and processing power, increasing the time and costs. Not counting its operational cost or its energy efficiency, a recent high-performance implementation of CRYSTALS-Dilithium achieved the best-known latency as low as 16.8 microseconds on an Artix-7 at 142 MHz chip [11]. This is manifold higher than the 1-microsecond target set for 6G.…”
Section: Introductionmentioning
confidence: 94%
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“…These large keys consume more storage space and processing power, increasing the time and costs. Not counting its operational cost or its energy efficiency, a recent high-performance implementation of CRYSTALS-Dilithium achieved the best-known latency as low as 16.8 microseconds on an Artix-7 at 142 MHz chip [11]. This is manifold higher than the 1-microsecond target set for 6G.…”
Section: Introductionmentioning
confidence: 94%
“…Not taking into account the Q-Day threat when designing 6G networks will be disastrous. With the existing PQC performance standards on latency [11] and cost [55] [56], meeting the 6G goals for one-microsecond latency [7] and 1000 times cost reduction [8] seems impossibly difficult. These circumstances may create a dire necessity to justify mothering as radical an invention as the AZT framework of this research.…”
Section: Conclusion and Future Prospectsmentioning
confidence: 99%