A high gain low noise amplifier design &amp; comparative analysis with other MOS-topologies for Bluetooth applications at 130nm CMOS

Balodi, Deepak; Verma, Arunima; Govidacharyulu, P. A.

doi:10.1109/ieacon.2016.8067409

Cited by 4 publications

(4 citation statements)

References 13 publications

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“…A cascode amplifier with inductive load and degeneration is appropriate for such a design goal and selected for evaluation in our work. Various different topologies can be applied for the implementation of LNAs, including common source [4,5], common gate [6,7], and cascode amplifiers [8,9]. In addition, resistive feedback [10] and noise-cancelling [11] LNAs are available options depending on the focus of design.…”

Section: Circuit Topologymentioning

confidence: 99%

Novel Approach and Methods for Optimizing Highly Sensitive Low Noise Amplifier CMOS IC Design for Congested RF Environments

Chung

Iliadis

2022

Electronics

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This work details the optimization and evaluation of a CMOS low-noise amplifier by developing a new algorithm for the gm/ID approach and combining with a modified figure of merit index method. The amplifier includes on-chip matching elements (such as IC inductors) for resonance at the targeted frequencies. The simulation results of the optimized LNA model showed scattering parameter S21 = 19.91 dB, noise figure NF = 3.54 dB and excellent linearity for third-order intermodulation parameter IIP3 = 5.89 dBm for the targeted frequency of f0 = 2.4 GHz.

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Section: Circuit Topologymentioning

confidence: 99%

Novel Approach and Methods for Optimizing Highly Sensitive Low Noise Amplifier CMOS IC Design for Congested RF Environments

Chung

Iliadis

2022

Electronics

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“…The compatibility of a microstrip based design line with the conventional CMOS technology implementation has been a major bottleneck since long. This perhaps been a strong reason due to which the developments of RF integrated circuits and especially the patch antenna designs have followed their own design routines using microstrip and high-k substrate based off-chip implementation [16]. Wherever possible, the CMOS integrity demands a greater effort towards combating the noise and signal attenuation, as has been explained in [16,17], with the conventional design style of CMOS based low noise LNA circuit.…”

Section: Introductionmentioning

confidence: 99%

“…This perhaps been a strong reason due to which the developments of RF integrated circuits and especially the patch antenna designs have followed their own design routines using microstrip and high-k substrate based off-chip implementation [16]. Wherever possible, the CMOS integrity demands a greater effort towards combating the noise and signal attenuation, as has been explained in [16,17], with the conventional design style of CMOS based low noise LNA circuit. The LNA design targets the application in the same spectrum range as that of the proposed patch antenna design in this presented work.…”

Section: Introductionmentioning

confidence: 99%

An Inset-Feed On-Chip Frequency Reconfigurable Patch Antenna Design with High Tuning Efficiency and Compatible Radome Structure for Broadband Wireless Applications

Verma

Yadava

Balodi³

2021

Scientia Iranica

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A novel, dual edge-shaped frequency reconfigurable antenna with a highly compact size is proposed, using microstrip line-based inset-feed mechanism. Proposed antenna uses cost-effective ROGER substrate of 0.787 mm thickness. The tuning reconfigurability has been achieved using two PIN diode switches, placed on the patch surface. The On-Off switching combinations of the PIN diodes provide variations in the current distribution and thereby altering the resonant frequencies. The proposed antenna offers the resonating spectrum in the range of 3 GHz to 9 GHz approximately, with maximum tuning efficiency of 43 % at 6.5 GHz, covering majority of modern RF standards. The proposed patch antenna design radiates with a reasonably high gain of 2.3 dBi at 5.04 GHz, with effective bandwidth of 2800 MHz (maximum at 6.5 GHz). The proposed multiband antenna with radome structure (ABS material) has been investigated under high-frequency simulation environment of HPEEsof (ADS-Keysight Technologies) and 3d radiation pattern (far-field gain, directivity and power calculations) have been obtained using momentum and EMDS. The final implementation size (without radome structure) comes as 23 mm X 26 mm large (595 mm 2 ). The proposed design paves the way for wireless applications including WLAN and WiMAX communication with its uniform far-field radiation pattern.

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“…The values of g m and C gs are calculated to give the required R in after selecting the L S value. The summary of designing the low noise amplifier steps is given below[7],[8]:Step1. The optimum device width of transistor M 1 and M 2 are determined…”

mentioning

confidence: 99%

Optimum Design of 2.4GHz Low Noise Amplifier (LNA)

Abdo¹,

Younis²,

Ismael³

2020

Proceedings of the Proceedings of the 1st International Multi-Disciplinary Conference Theme: Sustainable Development and Smart

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A 2.4 GHz Low Noise Amplifier (LNA) design, optimization and simulation is presented in this paper. The optimization tool available in ADS software is employed to obtain minimum noise figure (NF) and minimum power consumption for an inductive source degeneration LNA topology. A comparison between this approach and another available analytical method is performed and found a significant improvement in noise figure (optimized NF=0.823), and in power consumption (optimized value =8.6 mW).

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A high gain low noise amplifier design & comparative analysis with other MOS-topologies for Bluetooth applications at 130nm CMOS

Cited by 4 publications

References 13 publications

Novel Approach and Methods for Optimizing Highly Sensitive Low Noise Amplifier CMOS IC Design for Congested RF Environments

Novel Approach and Methods for Optimizing Highly Sensitive Low Noise Amplifier CMOS IC Design for Congested RF Environments

An Inset-Feed On-Chip Frequency Reconfigurable Patch Antenna Design with High Tuning Efficiency and Compatible Radome Structure for Broadband Wireless Applications

Optimum Design of 2.4GHz Low Noise Amplifier (LNA)

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