A High-Efficiency SOI CMOS Stacked-FET Power Amplifier Using Phase-Based Linearization

Abstract

A linearization technique based on the phase correction is proposed for a CMOS stacked-FET power amplifier (PA). The linearizer employs a phase injection circuit as a main linearizer. The phase injection circuit presents envelope-reshaped capacitance to the gate of a driver amplifier to correct for phase compression near saturation. It also helps with AM-AM linearization. Hybrid bias circuit consisting of a diode and a resistor is also employed for static adaptive biasing, which allows the PA to meet stringent linearity requirement across the entire power range. Two stacked-FET linear PAs with the proposed linearizers have been designed using a silicon-on-insulator (SOI) CMOS process at 1.88 and 0.9 GHz. The fabricated PAs show adjacent channel leakage ratios (ACLRs) better than with peak power-added efficiencies (PAEs) of 44.3 and 49.2% at 1.88 and 0.9 GHz, respectively, using 3GPP uplink W-CDMA signal.

A linear LTE‐advanced CMOS RF power amplifier with integrated phase linearizer

“…Table is a performance comparison table of the state‐of‐the‐art linear CMOS RF PA. Since most of the reported CMOS PA is tested with 10‐MHz 16‐QAM LTE signal , measured 10‐MHz 16‐QAM LTE performance without CFR is added in this table. The measured performance of this work is the best among the reported CMOS RF PAs.…”

“…It is worthwhile to note that the proposed phase linearizer does not have heavy capacitive loading in the signal path, the timing mismatch between incoming current and predistorted current at the output of the linearizer is simulated to 0.6 ns, which is only 8.64° phase mismatch in 40‐MHz BW signal, it is small enough to satisfied the linearity requirement for wideband signal . Even though most of the reported linearizers suffer from the memory effect and ACLR asymmetry especially in the wideband operation , the proposed linearizer can potentially support wideband signal.…”

“…A typical CMOS RF PA generally suffers from low breakdown voltage and poor linearity because of the AM–PM distortion caused by nonlinear junction capacitance of the CMOS FETs . Various linearization techniques have been investigated to improve the PA linearity, such as phase injection , dynamic gate bias control , feedback , and so on. These works successfully compensated the nonlinearities for 3G W‐CDMA, even 4G LTE applications, showing acceptable ACLRs.…”

“…However, for future communication standards, such as LTE‐advanced, the uplink PA is required to support intraband contiguous carrier aggregation signal whose operating bandwidth (BW) is expanded up to 40‐MHz without compromising the ACLR specification. The previous linearization techniques are limited to only 10‐MHz LTE bandwidth operation, so the development of the wideband linearizer that supports 40‐MHz BW LTE‐A application is urgently needed. In this work, a linear CMOS RF PA with an integrated phase linearizer that supports 40‐MHz BW LTE‐A application is presented.…”

“…In this work, a linear CMOS RF PA with an integrated phase linearizer that supports 40‐MHz BW LTE‐A application is presented. The traditional linearizing circuitries consist of envelope detector, re‐shaper, and injector, causing large timing mismatch between RF and envelope signal which restricts the available operation bandwidth . The proposed phase linearizer could considerably reduce the timing mismatch which makes it support 40‐MHz BW LTE‐A applications.…”