A high efficiency, high voltage, balanced cascode FET

Inoue, Akihisa; Goto, S.; Kunii, T.; Ishikawa, T.; Matsuda, Yoshihisa

doi:10.1109/mwsym.2005.1516694

Cited by 7 publications

(7 citation statements)

References 5 publications

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“…Each of these design problems can be reduced by using a balanced cascode configuration for individual cells [58]. The cascode configuration exhibits significantly reduced feedback and output conductance compared to a single common- source stage.…”

Section: Monolithic Pa Examplesmentioning

confidence: 99%

“…The cascode configuration exhibits significantly reduced feedback and output conductance compared to a single common- source stage. With the common-source and common-gate stages balanced as shown in [58], the drain voltage can be increased as much as twofold without incurring breakdown issues. Although device breakdown would support operation of the cascode cell up to a drain voltage of 80 V, the design becomes thermally limited.…”

Section: Monolithic Pa Examplesmentioning

confidence: 99%

See 1 more Smart Citation

A Review of GaN on SiC High Electron-Mobility Power Transistors and MMICs

Pengelly

Wood

Milligan

et al. 2012

IEEE Trans. Microwave Theory Techn.

837

311

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Gallium-nitride power transistor (GaN HEMT) and integrated circuit technologies have matured dramatically over the last few years, and many hundreds of thousands of devices have been manufactured and fielded in applications ranging from pulsed radars and counter-IED jammers to CATV modules and fourth-generation infrastructure base-stations. GaN HEMT devices, exhibiting high power densities coupled with high breakdown voltages, have opened up the possibilities for highly efficient power amplifiers (PAs) exploiting the principles of waveform engineered designs. This paper summarizes the unique advantages of GaN HEMTs compared to other power transistor technologies, with examples of where such features have been exploited. Since RF power densities of GaN HEMTs are many times higher than other technologies, much attention has also been given to thermal management-examples of both commercial "off-the-shelf" packaging as well as custom heat-sinks are described. The very desirable feature of having accurate large-signal models for both discrete transistors and monolithic microwave integrated circuit foundry are emphasized with a number of circuit design examples. GaN HEMT technology has been a major enabler for both very broadband high-PAs and very high-efficiency designs. This paper describes examples of broadband amplifiers, as well as several of the main areas of high-efficiency amplifier design-notably Class-D, Class-E, Class-F, and Class-J approaches, Doherty PAs, envelope-tracking techniques, and Chireix outphasing. Index Terms-Broadband, gallium nitride (GaN), high efficiency, monolithic microwave integrated circuit (MMIC), power amplifier (PAs), power transistor, silicon carbide.

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Section: Monolithic Pa Examplesmentioning

confidence: 99%

Section: Monolithic Pa Examplesmentioning

confidence: 99%

A Review of GaN on SiC High Electron-Mobility Power Transistors and MMICs

Pengelly

Wood

Milligan

et al. 2012

IEEE Trans. Microwave Theory Techn.

837

311

View full text Add to dashboard Cite

show abstract

“…The balanced cascode FET [3] has been designed for high efficiency operation at a single frequency to optimize a balance capacitor. Fig.…”

Section: Circuit Designmentioning

confidence: 99%

“…On the other hand, the series combination of FETs does not have the above problem of the impedances. For the configuration of series combination achieving high optimum load impedances and output power without degrading efficiency, balanced cascode FET [3] using the high voltage operation technique [4] has been developed. A balanced capacitor connecting to common-gate of FET in cascode circuit has been optimized at a single frequency to achieve high efficiency and optimum load impedances higher than single common-source FET.…”

Section: Introductionmentioning

confidence: 99%

Over 150% bandwidth ratio balanced cascode power amplifier with the optimum load impedances

Mukai

Yamauchi

Arai

2008

2008 Asia-Pacific Microwave Conference

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“…Furthermore, as a result of low breakdown voltages, the load line impedance at the amplifier output is low and decreases further with increasing the output power. Higher output powers entail increasing operating currents and thus higher losses arise [1].…”

Section: Introductionmentioning

confidence: 99%

6 GHz SiGe power amplifier with on-chip transformer combining

Grüner¹,

Boeck²

2007

2007 SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference

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The design synthesis of an innovative power amplifier topology is presented. It consists of two efficient pushpull stages whose output powers are combined by a monolithic three-port transformer. The design and optimization of the onchip transformers have been performed within a 2.5-D electromagnetic simulation environment. The integrated power amplifier is targeted for a SiGe HBT technology. It achieves a power added efficiency of 43.5 % and an output power of 28.3 dBm at a frequency of 6 GHz. The comparison of the proposed amplifier to a conventional push-pull amplifier has been carried out and the advantages of the new architecture over the conventional power amplifier are shown.

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A high efficiency, high voltage, balanced cascode FET

Cited by 7 publications

References 5 publications

A Review of GaN on SiC High Electron-Mobility Power Transistors and MMICs

A Review of GaN on SiC High Electron-Mobility Power Transistors and MMICs

Over 150% bandwidth ratio balanced cascode power amplifier with the optimum load impedances

6 GHz SiGe power amplifier with on-chip transformer combining

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