A Hetero-Integrated W-Band Transmitter Module in InP-on-BiCMOS Technology

Millimeter-Wave and Terahertz Transceivers in SiGe BiCMOS Technologies

“…Rather than following the classical "More Moore" path of ever increased performance and functionality by further scaling CMOS based SoCs, heterogeneous integration is a "More than Moore" approach, combining different technologies to realize SiPs or systems on modules (SoMs) to boost performance and functionality [193]. Often, the combination of different chip-level technologies is realized either by interposer technologies, often using organic PCB materials, or advanced packaging technologies, such as (a) Wafer photograph [191] and (b) vertical layer stack [192] of the wafer-bonded InP DHBT/SiGe BiCMOS heterogeneous integration technology.…”

“…A promising path to increase the performance of next-generation millimeter-wave and THz systems is the combination of SiGe BiCMOS with InP HBTs [192], which can be based on a waferbonding process of SiGe and InP wafers as described in [191]. This combination enables the utilization of the circuit complexity offered by an advanced SiGe BiCMOS process together with an InP HBT f t / f max of 350/350 GHz and InP HBT breakdown voltages BV CE0 in the range of 4 V. Fig.…”

“…19. (a) Wafer photograph[191] and (b) vertical layer stack[192] of the wafer-bonded InP DHBT/SiGe BiCMOS heterogeneous integration technology.…”

Effect of Thickness of InP Nucleation Layer on the Two-Step Growth of InP on Si(001)

“…Due to the highest reported RF figures-of-merit, indium phosphide (InP) based electronic technologies are well suited for signal amplification in the THz frequency regime, which has exhibited more extraordinary superiorities than Silicon-based devices in the microwave and millimeter-wave applications [7][8][9]. A variety of integration methods for heterogeneous integration of InP HBTs (heterojunction bipolar transistors) with Si CMOS have been used to realize ultrahigh-speed mixed-signal circuits: monolithic integration of InP-based transistors on Si [10], InP epitaxial transfer on top of the CMOS interconnect stack [11], fine-pitch bonding of InP chiplets on CMOS wafers [12].…”