A Hardware-Trojans Identifying Method Based on Trojan Net Scoring at Gate-Level Netlists

Oya, Masaru; Shi, Youhua; Yamashita, Noritaka; Okamura, Toshihiko; Tsunoo, Yukiyasu; Goto, Satoshi; Yanagisawa, Masao; Togawa, Nozomu

doi:10.1587/transfun.e98.a.2537

Cited by 11 publications

(6 citation statements)

References 9 publications

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“…For the reason that our method is static, it is not subject to the restrictions of HTs activation characteristics. The method in [3] is one of the strongest hardware Trojan identifying methods at gate-level netlists proposed so far. It extracts Trojan features introduced at Trust-HUB and defines an incremental metric to isolate some of Trojan nets from the rest of circuit.…”

Section: Discussionmentioning

confidence: 99%

“…On the other hand, pre-silicon design methods often detect HTs on gated level netlists, which can be categorized into two types: the dynamic and static detection. Dynamic detection techniques [3,4,5,6] generally judge a circuit according to the activation of HT parts. However, HTs are often latent and rarely activated under ordinary functional verification constrains thus hard to discover.…”

Section: Introductionmentioning

confidence: 99%

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Hardware Trojans classification based on controllability and observability in gate-level netlist

Xie

Sun

Chen

et al. 2017

IEICE Electron. Express

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This paper presents a hardware Trojan classification method that performs a static analysis in gate-level netlist. Based on the controllability and observability characteristics extracted in a circuit, the nets are clustered into two groups with the k-means method. Then inter-cluster distance is measured and taken as the major feature for Trojan identification. By combined with three other features in terms of circuit scale statistic number, a complementary representation of Trojan circuits is constructed. Finally, a support vector machine classifier is trained to distinguish the Trojan circuits from genuine circuits. Experimental results on Trust-HUB benchmarks demonstrate that our method can achieve up to 100% true positive rate.

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Section: Discussionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Hardware Trojans classification based on controllability and observability in gate-level netlist

Xie

Sun

Chen

et al. 2017

IEICE Electron. Express

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“…Circuit feature analysis can be applied to behavior or structural code to find suspicious assertions or modules. Other literatures [29], [30] used quantitative measurement or scoring mechanism to label dubious nets or gates.…”

Section: B Circuit Feature Analysismentioning

confidence: 99%

A Multi-Layer Hardware Trojan Protection Framework for IoT Chips

Dong

Liu

et al. 2019

IEEE Access

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Since integrated circuits are performed by several untrusted manufacturers, malicious circuits (hardware Trojans) can be implanted in any stage of the Internet-of-Things (IoT) devices. With the globalization of the IoT device manufacturing technologies, protecting the system-on-chip (SoC) security is always the keys issue for scientists and IC manufacturers. The existing SoC high-level synthesis approaches cannot guarantee both register-transfer-level and gate-level security, such as some formal verification and circuit characteristic analysis technologies. Based on the structural characteristics of hardware Trojans, we propose a multi-layer hardware Trojan protection framework for the Internet-of-Things perception layer called RG-Secure, which combines the third-party intellectual property trusted design strategy with the scan-chain netlist feature analysis technology. Especially at the gate level of chip design, our RG-Secure is equipped with a distributed, lightweight gradient lifting algorithm called lightGBM. The algorithm can quickly process high-dimensional circuit feature information and effectively improve the detection efficiency of hardware Trojans. In the meanwhile, a common evaluation index F-measure is used to prove the effectiveness of our method. The experiments show that RG-Secure framework can simultaneously detect register-transfer-level and gate-level hardware Trojans. For the trust-HUB benchmarks, the optimized lightGBM classifier achieves up to 100% true positive rate and 94% true negative rate; furthermore, it achieves 99.8% average F-measure and 99% accuracy, which shows a promising approach to ensure security during the design stage. INDEX TERMS Internet of Things, protection framework, hardware security, hardware Trojan.

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“…For the simple structures in SOP and POS, the Trojan circuits may be tracked by their structural pattern in feature analysis based detections [27,28,29,30], especially the bottom-up implementation of POS (POS-BU) where exists an AND-logic group. So we propose mixing these two structures showed in Fig.…”

Section: Structural Feature Analysismentioning

confidence: 99%

Holistic hardware Trojan design of trigger and payload at gate level with rare switching signals eliminated

Huang

Jiang

2019

IEICE Electron. Express

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A unified trigger and payload design scheme was proposed and re-convergent logic was introduced to eliminate rare transition signals which may be taken as suspicious signals in existing Trojan detections. Two Trojan structure templates were proposed and they could be applied to both privilege promotion and deny-of-service attacks. By combining these two structures in different proportion and position, a Trojan benchmark generation algorithm was proposed in which Trojan variations were resistant to feature analysis based detections. The proposed Trojans can obtain a very low activation probability using only primary inputs, which can reduce the restriction on primary trigger signals. So the Trojans will have better operability and adaptability in Trojan insertion. Then we discussed the method to keep concealed in fault diagnostic. At last, we made a comparison between the proposed Trojans and the state-of-the-art Trojan benchmarks on structural and logical features.

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A Hardware-Trojans Identifying Method Based on Trojan Net Scoring at Gate-Level Netlists

Cited by 11 publications

References 9 publications

Hardware Trojans classification based on controllability and observability in gate-level netlist

Hardware Trojans classification based on controllability and observability in gate-level netlist

A Multi-Layer Hardware Trojan Protection Framework for IoT Chips

Holistic hardware Trojan design of trigger and payload at gate level with rare switching signals eliminated

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