A Hardware Efficient Support Vector Machine Architecture for FPGA

Irick, Kevin; DeBole, Michael; Narayanan, V.; Gayasen, Aman

doi:10.1109/fccm.2008.40

Cited by 43 publications

(18 citation statements)

References 4 publications

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“…The most popular machine learning algorithms for which hardware implementations exist are neural networks [19,9] and, more recently, support vector machines [14]. Along with the fact that for these systems, "the actual rules implemented [are] not apparent" [19], their implementations are about five times as large as the LCT [14].…”

Section: Related Workmentioning

confidence: 99%

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Combining Software and Hardware LCS for Lightweight On-chip Learning

Bernauer

Zeppenfeld

Bringmann

et al. 2011

Organic Computing — A Paradigm Shift for Complex Systems

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Abstract. In this paper we present a novel two-stage method to realize a lightweight but very capable hardware implementation of a Learning Classifier System for on-chip learning. Learning Classifier Systems (LCS) allow taking good run-time decisions, but current hardware implementations are either large or have limited learning capabilities. In this work, we combine the capabilities of a software-based LCS, the XCS, with a lightweight hardware implementation, the LCT, retaining the benefits of both. We compare our method with other LCS implementations using the multiplexer problem and evaluate it with two chiprelated problems, run-time task allocation and SoC component parameterization. In all three problem sets, we find that the learning and selfadaptation capabilities are comparable to a full-fledged system, but with the added benefits of a lightweight hardware implementation, namely small area size and quick response time. Given our work, autonomous chips based on Learning Classifier Systems become feasible.

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Section: Related Workmentioning

confidence: 99%

“…Along with the fact that for these systems, "the actual rules implemented [are] not apparent" [19], their implementations are about five times as large as the LCT [14].…”

Section: Related Workmentioning

confidence: 99%

Combining Software and Hardware LCS for Lightweight On-chip Learning

Bernauer

Zeppenfeld

Bringmann

et al. 2011

Organic Computing — A Paradigm Shift for Complex Systems

View full text Add to dashboard Cite

show abstract

“…In the last decades several works have been devoted to adapt ML approaches to specific hardware platforms [Epitropakis et al, 2010;Genov and Cauwenberghs, 2003;Irick et al, 2008;Lee et al, 2003] and, in particular, to analyze the effects of parameter quantization on the training and FFPs [Anguita et al, 2007;Lesser et al, 2011;Neven et al, 2009]. Motivations for these activities are usually linked to application-specific requirements but also to the basic principle of the SLT [Vapnik, 1995] where we have to search for the simplest model that correctly classifies the available data.…”

Section: Hf-svm and Statistical Learning Theorymentioning

confidence: 99%

Energy-Efficient Technologies in Device-to-Device Based Proximity Service

Wang¹,

Vasilakos²,

Jin³

et al. 2017

Device-to-Device Based Proximity Service

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ADVERTIMENT. La consulta d'aquesta tesi queda condicionada a l'acceptació de les següents condicions d'ús: La difusió d'aquesta tesi per mitjà del servei TDX (www.tesisenxarxa.net) ha estat autoritzada pels titulars dels drets de propietat intel·lectual únicament per a usos privats emmarcats en activitats d'investigació i docència. No s'autoritza la seva reproducció amb finalitats de lucre ni la seva difusió i posada a disposició des d'un lloc aliè al servei TDX. No s'autoritza la presentació del seu contingut en una finestra o marc aliè a TDX (framing). Aquesta reserva de drets afecta tant al resum de presentació de la tesi com als seus continguts. En la utilització o cita de parts de la tesi és obligat indicar el nom de la persona autora.ADVERTENCIA. La consulta de esta tesis queda condicionada a la aceptación de las siguientes condiciones de uso: La difusión de esta tesis por medio del servicio TDR (www.tesisenred.net) ha sido autorizada por los titulares de los derechos de propiedad intelectual únicamente para usos privados enmarcados en actividades de investigación y docencia. No se autoriza su reproducción con finalidades de lucro ni su difusión y puesta a disposición desde un sitio ajeno al servicio TDR. No se autoriza la presentación de su contenido en una ventana o marco ajeno a TDR (framing). Esta reserva de derechos afecta tanto al resumen de presentación de la tesis como a sus contenidos. En la utilización o cita de partes de la tesis es obligado indicar el nombre de la persona autora. WARNING.On having consulted this thesis you're accepting the following use conditions: Spreading this thesis by the TDX (www.tesisenxarxa.net) service has been authorized by the titular of the intellectual property rights only for private uses placed in investigation and teaching activities. Reproduction with lucrative aims is not authorized neither its spreading and availability from a site foreign to the TDX service. Introducing its content in a window or frame foreign to the TDX service is not authorized (framing). This rights affect to the presentation summary of the thesis as well as to its contents. In the using or citation of parts of the thesis it's obliged to indicate the name of the author The first stage to accomplish HAR requires to make observations from ambient or wearable sensor technologies. However, in the second case, the search for pervasive, unobtrusive, low-powered, and low-cost devices for achieving this challenging task still has not been fully addressed. In this thesis, we explore the use of smartphones as an alternative approach for performing the identification of physical activities. These self-contained devices, which are widely available in the market, are provided with embedded sensors, powerful computing capabilities and wireless communication technologies that make them highly suitable for this application.This work presents a series of contributions regarding the development of HAR systems with smartphones. In the first place we propose a fully operational system that recognizes in real...

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“…Due to its importance, several FPGA-based implementation of SVMs have been reported using techniques such as Logarithmic Number Systems [4], Cascade SVM [13,16], systolic architectures [4,6], mixed-precision [14], coprocessor [2], and data flow architectures. Most of these studies focused on binary classifiers and were tailored to special applications.…”

Section: Introductionmentioning

confidence: 99%

A Scalable Dataflow Accelerator for Real Time Onboard Hyperspectral Image Classification

Wang

Niu

et al. 2016

Lecture Notes in Computer Science

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Abstract. Real-time hyperspectral image classification is a necessary primitive in many remotely sensed image analysis applications. Previous work has shown that Support Vector Machines (SVMs) can achieve high classification accuracy, but unfortunately it is very computationally expensive.This paper presents a scalable dataflow accelerator on FPGA for real-time SVM classification of hyperspectral images.To address data dependencies, we adapt multi-class classifier based on Hamming distance. The architecture is scalable to high problem dimensionality and available hardware resources. Implementation results show that the FPGA design achieves speedups of 26x, 1335x, 66x and 14x compared with implementations on ZYNQ, ARM, DSP and Xeon processors. Moreover, one to two orders of magnitude reduction in power consumption is achieved for the AVRIS hyperspectral image datasets.

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A Hardware Efficient Support Vector Machine Architecture for FPGA

Cited by 43 publications

References 4 publications

Combining Software and Hardware LCS for Lightweight On-chip Learning

Combining Software and Hardware LCS for Lightweight On-chip Learning

Energy-Efficient Technologies in Device-to-Device Based Proximity Service

A Scalable Dataflow Accelerator for Real Time Onboard Hyperspectral Image Classification

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