2013 IEEE International Conference on Signal Processing, Communication and Computing (ICSPCC 2013) 2013
DOI: 10.1109/icspcc.2013.6664135
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A hardware design for time delay estimation of TDOA

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Cited by 3 publications
(3 citation statements)
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“…Let us note that, assuming convergence (5), it is worth choosing coefficients k n in (6) in such a way that…”
Section: Algorithm With the Adaptive Lms Filtermentioning
confidence: 99%
See 1 more Smart Citation
“…Let us note that, assuming convergence (5), it is worth choosing coefficients k n in (6) in such a way that…”
Section: Algorithm With the Adaptive Lms Filtermentioning
confidence: 99%
“…Although the paper focuses on the study of passive TDE methods [3] used to locate leaks, active methods are also briefly discussed in the subsequent section. The discussion is essential for a better understanding of the peculiarities and algorithmic implementation of the passive methods [5,6].…”
Section: Introductionmentioning
confidence: 99%
“…En general, los cálculos de los algoritmos son divididos entre la FPGA que paraleliza el procesamiento de operaciones como la FFT; mientras que el DSP facilita la implementaciones de operaciones con matrices. El empleo conjunto de FPGA y DSP es planteado por Li et al (2013) con técnicas TDoA sobre un sistema de múltiples nodos sincronizados con GPS. Cada nodo consta de una antena, una FPGA y un DSP, conectados a una computadora central vía Ethernet que obtiene la información de todas las estaciones y realiza los cálculos para la estimación.…”
Section: Configuraciones Híbridasunclassified