A hardware architecture to deploy complex multiprocessor scheduling algorithms

Abstract

Abstract-An increasing demand for high-performance systems has been observed in the domain of both general purpose and real-time systems, pushing the industry towards a pervasive transition to multi-core platforms. Unfortunately, well-known and efficient scheduling results for single-core systems do not scale well to the multi-core domain. This justifies the adoption of more computationally intensive algorithms, but the complexity and computational overhead of these algorithms impact their applicability to real OSes.We propose an architecture to migrate the burden of multicore scheduling to a dedicated hardware component. We show that it is possible to mitigate the overhead of complex algorithms, while achieving power efficiency and optimizing processors utilization. We develop the idea of "active monitoring" to continuously track the evolution of scheduling parameters as tasks execute on processors. This allows reducing the gap between implementable scheduling techniques and the ideal fluid scheduling model, under the constraints of realistic hardware.

Load monitoring module for multiprocessor performance optimization

“…Common for all mentioned approaches is that, for load monitoring, they use integrated performance counters which does not enable any application level control and explicit definition of job of interest. Since scheduling and execution optimization algorithms are becoming more complex demand for high efficient hardware solution emerged and is proposed in [6]. In this paper authors also rely on hardware counters but they assume to have one counter module for each task in the system limiting flexibility of proposed solution.…”