2005 IEEE International Symposium on Circuits and Systems
DOI: 10.1109/iscas.2005.1466052
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A Generic Multilevel Multiplying D/A Converter for Pipelined ADCs

Abstract: Abstract-State-of-art implementations of pipelined ADCs can only realize a multiplying DAC (MDAC) with (2 n -1) levels. However, the number of levels needed to optimize the performance may differ from this number. A novel scheme is proposed allowing for realization of an arbitrary number of MDAC levels, while allowing for 1 bit of digital redundancy and digital error correction without any overhead.

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Cited by 3 publications
(4 citation statements)
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“…In conventional restoring redundancy with Z added levels (CRZ), fewer levels are used than in the half-bit redun- dant case, but more than in the integer ADC [20], [21]. This, like half-bit redundancy, will allow for correction of over-range errors due to sub-ADC offsets and settling errors, but will have a smaller redundancy magnitude than half-bit redundancy.…”
Section: B Crz Redundancymentioning
confidence: 99%
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“…In conventional restoring redundancy with Z added levels (CRZ), fewer levels are used than in the half-bit redun- dant case, but more than in the integer ADC [20], [21]. This, like half-bit redundancy, will allow for correction of over-range errors due to sub-ADC offsets and settling errors, but will have a smaller redundancy magnitude than half-bit redundancy.…”
Section: B Crz Redundancymentioning
confidence: 99%
“…Thus, there is a clear tradeoff with the CRZ scheme between the number of comparators and the loss in redundancy with greater digital complexity. One note is that [21] does achieve reduced digital complexity over [20] by changing the interstage gain of a pipeline stage, making the CRZ error correction logic look much more like that of a half-bit ADC. Example low-resolution full bit, half bit, and CRZ redundant stages are displayed in Fig.…”
Section: B Crz Redundancymentioning
confidence: 99%
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“…Such gain distributions among MDACs are sub-optimal. Recently, it is demonstrated that employing a first-stage with an integer-gain (G=3) may reduce power consumption significantly [7][8]. Hence, for a given resolution it is always possible to find a better gain distribution with integer and non-integer gain MDACs as in any other system.…”
Section: Introductionmentioning
confidence: 99%