IECON'03. 29th Annual Conference of the IEEE Industrial Electronics Society (IEEE Cat. No.03CH37468)
DOI: 10.1109/iecon.2003.1280217
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A gate drive circuit for silicon carbide JFET

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Cited by 43 publications
(17 citation statements)
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“…The need to develop suitable gate or base drive in pursue of full utilization of the SiC JFET, MOSFET and BJT high speed capabilities has hence become apparent, where the major obstacle faced has been the different requests of SiC components. To solve this problem, several researches have been done to consider special attention which is required [15][16][17][18][19]. In the following section, different requests for driving SiC power devices and gate or base drives which have been developed and used for implementation of SiC matrix converter are presented.…”
Section: Experimental Arrangmentmentioning
confidence: 99%
“…The need to develop suitable gate or base drive in pursue of full utilization of the SiC JFET, MOSFET and BJT high speed capabilities has hence become apparent, where the major obstacle faced has been the different requests of SiC components. To solve this problem, several researches have been done to consider special attention which is required [15][16][17][18][19]. In the following section, different requests for driving SiC power devices and gate or base drives which have been developed and used for implementation of SiC matrix converter are presented.…”
Section: Experimental Arrangmentmentioning
confidence: 99%
“…Device turn-off is provided by D1 while R2/C1 generates a negative voltage to discharge the gate capacitances and thus aid in providing a faster turn-off. A good gate drive design [6] [7] is helpful is achieving excellent switching characteristics [8] for the SiC JFET. The waveforms in Fig.…”
Section: Gate Drive Designmentioning
confidence: 99%
“…This gate driver design will not limit the gate current to a low level under a gate avalanche condition and would likely destroy the device. Another gate driver incorporating avalanche current limiting is proposed in [7] and the authors compare the resulting JFET switching losses to the cascode driven by a MOSFET driver circuit. It was found that for the JFET only device the switching losses were reduced by 9% compared to the cascode.…”
Section: Sic Jfet Gate Drivermentioning
confidence: 99%
“…However for the SiC JFET a modified driver must be used since it is a normally-on device that typically requires a large negative bias to turn off. SiC JFET gate drivers have been previously presented [5]- [7], although in [5] this gate driver was not designed for production purposes and could not easily cope with the variable device-todevice JFET characteristics. An improved gate driver was reported in [7] that could cope with the varying JFET characteristics but reported only a 9% reduction in switching loss compared to using a SiC cascode with a standard gate driver.…”
Section: Introductionmentioning
confidence: 99%
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