A Fully Synthesizable All-Digital PLL With Interpolative Phase Coupled Oscillator, Current-Output DAC, and Fine-Resolution Digital Varactor Using Gated Edge Injection Technique

Deng, Wei; Yang, Dongxu; Ueno, Takahiro; Siriburanon, Teerachot; Kondo, Satoshi; Okada, Kei; Matsuzawa, Akira

doi:10.1109/jssc.2014.2348311

Cited by 122 publications

(56 citation statements)

References 20 publications

Supporting

Mentioning

Contrasting

Unclassified

Order By: Relevance

“…For a further digitization, some synthesizable analog circuits have been reported such as synthesizable PLL [31], [32] and synthesizable ADC [33].…”

Section: Digitally-synthesizable Analog Circuitsmentioning

confidence: 99%

“…To achieve high performance by a synthesizable analog circuit, a synthesisfriendly architecture has to be developed. As an example of synthesis-friendly PLL, an injection-lock-based PLL is introduced below [31], [32].…”

Section: Digitally-synthesizable Analog Circuitsmentioning

confidence: 99%

“…A digitally-controlled varactor can be realized by a NAND gate [31], [32], [34] as shown in Fig. 19, and a digitally-controlled oscillator (DCO) can also be realized by MUXs and the digitally-controlled varactor [35].…”

Section: Digitally-synthesizable Analog Circuitsmentioning

confidence: 99%

See 2 more Smart Citations

Digitally Assisted Analog and RF Circuits

Okada

2015

IEICE Trans. Electron.

Self Cite

View full text Add to dashboard Cite

SUMMARY In this paper, the importance and perspective for the digitally-assisted analog and RF circuits are discussed, especially related to wireless transceivers. Digital calibration techniques for compensating I/Q mismatch, IM2, and LO impairments in cellular, 2.4 GHz WiFi, and 60 GHz WiGig transceivers are introduced with detailed analysis and circuit implementations. Future technology directions such as the shift from digitally-assisted analog circuit to digitally-designed analog circuit will also be discussed.

show abstract

“…For a further digitization, some synthesizable analog circuits have been reported such as synthesizable PLL [31], [32] and synthesizable ADC [33].…”

Section: Digitally-synthesizable Analog Circuitsmentioning

confidence: 99%

Section: Digitally-synthesizable Analog Circuitsmentioning

confidence: 99%

See 1 more Smart Citation

Digitally Assisted Analog and RF Circuits

Okada

2015

IEICE Trans. Electron.

Self Cite

View full text Add to dashboard Cite

show abstract

“…M IXED-SIGNAL functions can be implemented with standard digital components by employing a timedomain signal representation [1]- [9], which is an interesting approach to build high performance data converters in ultra deep submicrometer (UDSM) CMOS processes. While conventional analog data converter architectures are difficult to design in modern processes, implementation with digital components benefits from the excellent time resolution provided by deep submicrometer technologies.…”

Section: Introductionmentioning

confidence: 99%

Mitigation of Sampling Errors in VCO-Based ADCs

Unnikrishnan

Vesterbacka

2017

IEEE Trans. Circuits Syst. I

View full text Add to dashboard Cite

Abstract-VCO-based ADC is a scaling-friendly architecture to build ADCs in fine-feature CMOS processes. Lending itself to an implementation with digital components, such a converter enables design automation with existing digital CAD hence reducing design and porting costs compared to a custom design flow. However, robust architectures and circuit techniques that reduce the dependence of performance on component accuracy are required to achieve good performance while designing converters with low accuracy components like standard cells in deeply-scaled processes. This work investigates errors resulting from sampling of a fast switching multi-phase ring oscillator output. A scheme employing ones-counters is proposed to encode the sampled ring oscillator code into a binary representation, which is resilient to a class of sampling induced errors modeled by temporal reordering of the transitions in the ring. In addition to correcting errors caused by deterministic reordering, proposed encoding suppresses conversion errors in the presence of arbitrary reordering patterns that may result from automatic place-and-route in wire-delay dominated processes. The error suppression capability of the encoding is demonstrated using MATLAB simulation. The proposed encoder reduces the error caused by random reordering of six subsequent bits in the sampled signal from 31 to 2 LSBs for a 31-stage oscillator.

show abstract

“…Some examples are given below. Phase locked loops (PLLs) and frequency synthesizers are now being designed with digital components as well as being synthesized using standard cells [16,17]. An all-digital frequency synthesizer architecture is shown in Fig.…”

Section: Digital Implementation Of Analog/mixedsignal Functionsmentioning

confidence: 99%

Design of VCO-based ADCs

Unnikrishnan¹

View full text Add to dashboard Cite

Today's complex electronic systems with billions of transistors on a single die are enabled by the aggressive scaling down of the device feature size at an exponential rate as predicted by the Moore's law. Digital circuits benefit from technology scaling to become faster, more energy efficient as well as more area efficient as the feature size is scaled down. Moreover, digital design also benefits from mature CAD tools that simplify the design and cross-technology porting of complex systems, leveraging on a cell-based design methodology. On the other hand, the design of analog circuits is getting increasingly difficult as the feature size scales down into the deep nanometer regime due to a variety of reasons like shrinking voltage headroom, reducing intrinsic gain of the devices, increasing noise coupling between circuit nodes due to shorter distances etc. Furthermore, analog circuits are still largely designed with a full custom design flow that makes their design and porting tedious, slow, and expensive. In this context, it is attractive to consider realizing analog/mixed-signal circuits using standard digital components. This leads to scaling-friendly mixed-signal blocks that can be designed and ported using the existing CAD framework available for digital design. The concept is already being applied to mixed-signal components like frequency synthesizers where all-digital architectures are synthesized using standard cells as basic components. This can be extended to other mixed-signal blocks like digital-to-analog and analogto-digital converters as well, where the latter is of particular interest in this thesis.A voltage-controlled oscillator (VCO)-based analog-to-digital converter (ADC) is an attractive architecture to achieve all-digital analog-todigital conversion due to favorable properties like shaping of the quantization error, inherent anti-alias filtering etc. Here a VCO operates as a signal integrator as well as a quantizer. A converter employing a ring oscillator as the VCO lends itself to an all-digital implementation.iii In this dissertation, we explore the design of VCO-based ADCs synthesized using digital standard cells with the long-term goal of achieving high performance data converters built from low accuracy switch components. In a first step, an ADC is designed using vendor supplied standard cells and fabricated in a 65 nm CMOS process. The converter delivers an 8-bit ENOB over a 25 MHz bandwidth while consuming 3.3 mW of power resulting in an energy efficiency of 235 fJ/step (Walden FoM). Then we utilize standard digital CAD tools to synthesize converter designs that are fully described using a hardware description language. A polynomial-based digital post-processing scheme is proposed to correct for the VCO nonlinearity. In addition, pulse modulation schemes like delta modulation and asynchronous sigma-delta modulation are used as a signal pre-coding scheme, in an attempt to reduce the impact of VCO nonlinearity on converter performance. In order to investigate the scaling benefit...

show abstract

A Fully Synthesizable All-Digital PLL With Interpolative Phase Coupled Oscillator, Current-Output DAC, and Fine-Resolution Digital Varactor Using Gated Edge Injection Technique

Cited by 122 publications

References 20 publications

Digitally Assisted Analog and RF Circuits

Digitally Assisted Analog and RF Circuits

Mitigation of Sampling Errors in VCO-Based ADCs

Design of VCO-based ADCs

Contact Info

Product

Resources

About