A fully matched dual stage CMOS power amplifier with integrated passive linearizer attaining 23 db gain, 40% PAE and 28 DBM OIP3

Abstract

Purpose The purpose of this paper is to introduce a new linearization technique known as the passive linearizer technique which does not affect the power added efficiency (PAE) while maintaining a power gain of more than 20 dB for complementary metal oxide semiconductor (CMOS) power amplifier (PA). Design/methodology/approach The linearization mechanism is executed with an aid of a passive linearizer implemented at the gate of the main amplifier to minimize the effect of Cgs capacitance through the generation of opposite phase response at the main amplifier. The inductor-less output matching network presents an almost lossless output matching network which contributes to high gain, PAE and output power. The linearity performance is improved without the penalty of power consumption, power gain and stability. Findings With this topology, the PA delivers more than 20 dB gain for the Bluetooth Low Energy (BLE) Band from 2.4 GHz to 2.5 GHz with a supply headroom of 1.8 V. At the center frequency of 2.45 GHz, the PA exhibits a gain of 23.3 dB with corresponding peak PAE of 40.11% at a maximum output power of 14.3 dBm. At a maximum linear output power of 12.7 dBm, a PAE of 37.3% has been achieved with a peak third order intermodulation product of 28.04 dBm with a power consumption of 50.58 mW. This corresponds to ACLR of – 20 dBc, thus qualifying the PA to operate for BLE operation. Practical implications The proposed technique is able to boost up the efficiency and output power, as well as linearize the PA closer to 1 dB compression point. This reduces the trade-off between linear output power and PAE in CMOS PA design. Originality/value The proposed CMOS PA can be integrated comfortably to a BLE transmitter, allowing it to reduce the transceiver’s overall power consumption.

Design of radio frequency power amplifier for 2.45 GHz IoT application using 0.18 µm CMOS technology

“…The output power of the PA used in this study is 13.28 dBm, which is lower than (Dos 15dBm, (Gunasegaran et al, 2017) 15 dBm and (Gunasegaran et al, 2021a(Gunasegaran et al, , 2021b 23 dBm, but higher than (Haridas et al, 2009), which is 6.4 dBm. The output power of (Gunasegaran et al, 2021a(Gunasegaran et al, , 2021b) is greater than this work because it uses a 3.3 V power source. The output power achieved by this work is acceptable because this PA is developed for BLE transmitter application, which requires a minimum of 10 dBm output power to transmit the signal in the BLE standard.…”

“…In Gunasegaran et al (2017) and Xu et al (2014), the PAs can achieve higher PAE of 33.3% and 36.4% because of the implementation of the Linearity Enhancement Technique (Gunasegaran et al, 2017) and are biased in Class-E (Xu et al, 2014) to improve the efficiency. Design in Gunasegaran et al (2021aGunasegaran et al ( , 2021b is able to achieve a high PAE that is 36% by using a stacked power block technique that will reduce the trade-off between linear output power and PAE. However, the core area without a bondpad (Gunasegaran et al, 2021a(Gunasegaran et al, , 2021b) is bigger than this work, which is 1.47 mm 2 .…”

“…The findings of the comparison between this study and earlier studies produced by other researchers are compiled into a table, as shown in Table 3. The PA used in this study has a gain of 22 dB compared to PAs from Gunasegaran et al (2017), Xu et al (2014), Haridas et al (2009) and Gunasegaran et al (2021a, 2021b), which have gains of 10 dB, 11.8 dB, 11 dB and 10 dB, respectively. The output power of the PA used in this study is 13.28 dBm, which is lower than (Dos Santos et al , 2017) 15 dBm, (Gunasegaran et al , 2017) 15 dBm and (Gunasegaran et al , 2021a, 2021b) 23 dBm, but higher than (Haridas et al , 2009), which is 6.4 dBm.…”

“…The PA used in this study has a gain of 22 dB compared to PAs from Gunasegaran et al (2017), Xu et al (2014), Haridas et al (2009) and Gunasegaran et al (2021a, 2021b), which have gains of 10 dB, 11.8 dB, 11 dB and 10 dB, respectively. The output power of the PA used in this study is 13.28 dBm, which is lower than (Dos Santos et al , 2017) 15 dBm, (Gunasegaran et al , 2017) 15 dBm and (Gunasegaran et al , 2021a, 2021b) 23 dBm, but higher than (Haridas et al , 2009), which is 6.4 dBm. The output power of (Gunasegaran et al , 2021a, 2021b) is greater than this work because it uses a 3.3 V power source.…”

“…Design in Gunasegaran et al (2021a, 2021b) is able to achieve a high PAE that is 36% by using a stacked power block technique that will reduce the trade-off between linear output power and PAE. However, the core area without a bondpad (Gunasegaran et al , 2021a, 2021b) is bigger than this work, which is 1.47 mm 2 . Despite the slight disadvantage, the PA in this work can achieve the PAE nearly the same as (Dos Santos et al , 2017), that is, 17.9%–19% and 18% for (Haridas et al , 2009) without the linearity enhancement technique.…”