“…In addition, comparing to the designs proposed in [5] and [10], the inductance tuning is realized by single capacitor bank instead of two, subsequently, less number of controlling bits, easier control algorithm and significant reduction in chip area can be achieved. The silicon area is further reduced by proving DC feed supply to the transistors through balun inductors [11]. Although, due to differential topology two capacitor banks are required as the shunt capacitors but since they are driven from the same control signal, the number of control signals remains conserved.…”