A FSM based approach for efficient implementation of K-means algorithm

Ratnakumar, Rahul; Nanda, Satyasai Jagannath

doi:10.1109/isvdat.2016.8064848

Cited by 11 publications

(22 citation statements)

References 13 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In [10], a distance calculation unit has been proposed to calculate similarity distances between data samples and cluster centroids in a hardware implementation of the K-means clustering algorithm. e proposed design calculates K distances between a data sample of M features and K cluster centroids concurrently using K adder trees of M − 1 adders each.…”

Section: Related Workmentioning

confidence: 99%

“…Conditions in (9) and (10) are the minimum constraints that can be used to get a valid scheduling function.…”

Section: Data Schedulingmentioning

confidence: 99%

“…Our strategy for arriving at suitable scheduling functions combines pipelining and broadcast restrictions in (9) and (10). We start by choosing to pipeline the evaluation of all points that lie in a plane perpendicular to one of the three k-, m-, and n-axes.…”

Section: Data Schedulingmentioning

confidence: 99%

“…is architecture is similar to Design #1 with input X being pipelined rather than broadcast. Scheduling vector s 1 can be modi ed to re ect this change by applying the pipeline restriction in (10) instead of the broadcast restriction in (9). e modi ed scheduling vector is as follows: processor array architecture is shown in Figure 13.…”

Section: Design Comparisonmentioning

confidence: 99%

“…eoretical time and area complexities for some architectures, including the ones presented in [7][8][9], have not been validated experimentally. Implementation results reported for other architectures, including [10,11], are for low-dimensional datasets of dimensions 4 and 9, respectively. Despite the fact that these architectures have low theoretical time complexities, their poor scalability to high-dimensional data makes them not suitable for hardware implementation or implementable with poor performance, as discussed in [6].…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Low-Complexity Scalable Architectures for Parallel Computation of Similarity Measures

Kanan

Gebali

Ibrahim

et al. 2019

Scientific Programming

View full text Add to dashboard Cite

Processor array architectures have been employed, as an accelerator, to compute similarity distance found in a variety of data mining algorithms. However, most of the proposed architectures in the existing literature are designed in an ad hoc manner without taking into consideration the size and dimensionality of the datasets. Furthermore, data dependencies have not been analyzed, and often, only one design choice is considered for the scheduling and mapping of computational tasks. In this work, we present a systematic methodology to design scalable and area-efficient linear (1-D) processor arrays for the computation of similarity distance matrices. Six possible design options are obtained and analyzed in terms of area and time complexities. The obtained architectures provide us with the flexibility to choose the one that meets hardware constraints for a specific problem size. Comparisons with the previously reported architectures demonstrate that one of the proposed architectures achieves less area and area-delay product besides its scalability to high-dimensional data.

show abstract

Section: Related Workmentioning

confidence: 99%

“…Conditions in (9) and (10) are the minimum constraints that can be used to get a valid scheduling function.…”

Section: Data Schedulingmentioning

confidence: 99%

Section: Data Schedulingmentioning

confidence: 99%

Section: Design Comparisonmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Low-Complexity Scalable Architectures for Parallel Computation of Similarity Measures

Kanan

Gebali

Ibrahim

et al. 2019

Scientific Programming

View full text Add to dashboard Cite

show abstract

A high‐speed unsupervised hardware architecture for rapid diagnosis of COVID‐19

Ratnakumar

Nanda

2022

Circuit Theory & Apps

Self Cite

View full text Add to dashboard Cite

Summary In the diagnosis of COVID‐19, investigation, analysis, and automatic counting of blood cell clusters are the most essential steps. Currently employed methods for cell segmentation, identification, and counting are time‐consuming and sometimes performed manually from sampled blood smears, which is hard and needs the support of an expert laboratory technician. The conventional method for the blood‐count‐test is by automatic hematology analyzer which is quite expensive and slow. Moreover, most of the unsupervised learning techniques currently available presume the medical practitioner to have a prior knowledge regarding the number and action of possible segments within the image before applying recognition. This assumption fails most often as the severity of the disease gets increased like the advanced stages of COVID‐19, lung cancer etc. In this manuscript, a simplified automatic histopathological image analysis technique and its hardware architecture suited for blind segmentation, cell counting, and retrieving the cell parameters like radii, area, and perimeter has been identified not only to speed up but also to ease the process of diagnosis as well as prognosis of COVID‐19. This is achieved by combining three algorithms: the K‐means algorithm, a novel statistical analysis technique‐HIST (histogram separation technique), and an islanding method an improved version of CCA algorithm/blob detection technique. The proposed method is applied to 15 chronic respiratory disease cases of COVID‐19 taken from high profile hospital databases. The output in terms of quantitative parameters like PSNR, SSIM, and qualitative analysis clearly reveals the usefulness of this technique in quick cytological evaluation. The proposed high‐speed and low‐cost architecture gives promising results in terms of performance of 190 MHz clock frequency, which is two times faster than its software implementation.

show abstract

A Hardware Architecture Based on Genetic Clustering for Color Image Segmentation

Ratnakumar

Nanda

2018

Advances in Intelligent Systems and Computing

View full text Add to dashboard Cite

A FSM based approach for efficient implementation of K-means algorithm

Cited by 11 publications

References 13 publications

Low-Complexity Scalable Architectures for Parallel Computation of Similarity Measures

Low-Complexity Scalable Architectures for Parallel Computation of Similarity Measures

A high‐speed unsupervised hardware architecture for rapid diagnosis of COVID‐19

A Hardware Architecture Based on Genetic Clustering for Color Image Segmentation

Contact Info

Product

Resources

About