2007
DOI: 10.1007/978-3-540-75664-4_16
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A Framework for Hardware-in-the-Loop Testing of an Integrated Architecture

Abstract: Abstract. In this paper we present a distributed Hardware-in-the-Loop (HiL) simulation approach that supports the verification and validation activities in an integrated architecture as recently developed in DE-COS (Dependable Embedded COmponents and Systems), an integrated project within the Sixth Framework Programme of the European Commission. Focusing on the interconnection between the simulated environment and the Integrated System Under Test (ISUT), our approach involves the concept of a Smart Virtual Tra… Show more

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Cited by 13 publications
(8 citation statements)
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“…Chae et al 27 have presented a testing environment for embedded systems which utilizes TTCN-3 notation in test specifications and SiL simulation for executing the tests. HiL simulation and testing have been utilized for example by Short and Pont, 28 Schlager et al 29 and Stoeppler et al 30 However, in the application domain of industrial control, simulations within MDD have been utilized mainly in approaches targeted to IEC 61499 platforms or with use of co-simulation after generating code. This is surprising because simulations have been used extensively in control algorithm development, i.e.…”
Section: Simulations Within Mddmentioning
confidence: 99%
See 1 more Smart Citation
“…Chae et al 27 have presented a testing environment for embedded systems which utilizes TTCN-3 notation in test specifications and SiL simulation for executing the tests. HiL simulation and testing have been utilized for example by Short and Pont, 28 Schlager et al 29 and Stoeppler et al 30 However, in the application domain of industrial control, simulations within MDD have been utilized mainly in approaches targeted to IEC 61499 platforms or with use of co-simulation after generating code. This is surprising because simulations have been used extensively in control algorithm development, i.e.…”
Section: Simulations Within Mddmentioning
confidence: 99%
“…Chae et al 27 have presented a testing environment for embedded systems which utilizes TTCN-3 notation in test specifications and SiL simulation for executing the tests. HiL simulation and testing have been utilized for example by Short and Pont, 28 Schlager et al 29 and Stoeppler et al 30…”
Section: Related Workmentioning
confidence: 99%
“…A testing environment that uses SiL simulations is presented in [6]. HiL simulation and testing have been utilized, for example, in [7][8][9].…”
Section: Related Workmentioning
confidence: 99%
“…Another HIL-simulation approach is outlined by Schlager et al, trying to reduce the complexity of realizing such environments. At the same time, this approach ensures the scalability of the interfaces for the realization of an integrated architecture, concentrating on HIL-specific aspects [17]. Tideman et al present a simulation environment by connecting PreS-CAN and dSPACE components with each other to test a lane keeping assist [18].…”
Section: Related Workmentioning
confidence: 99%