A FPGA-Based Post-Processing and Validation Platform for Random Number Generators

Gantel, Laurent; Duc, Alexandre; Steiner, Lucie; Vannel, Fabien; Upegui, Andrés; Gluck, Florent

doi:10.1109/ipdpsw50202.2020.00027

Cited by 5 publications

(2 citation statements)

References 10 publications

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“…Gantel et al [31] proposed a validation and postprocessing platform for TRNGs. Test results are used to determine if the output of the TRNG needs to be postprocessed.…”

Section: Hardware Implementation Of Randomness Testmentioning

confidence: 99%

Design and Implementation of an On-Line Quality Control System for Latch-Based True Random Number Generator

FUJIEDA,

ICHIKAWA,

OYA

et al. 2023

IEICE Trans. Inf. & Syst.

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This paper presents a design and an implementation of an on-line quality control method for a TRNG (True Random Number Generator) on an FPGA. It is based on a TRNG with RS latches and a temporal XOR corrector, which can make a trade-off between throughput and randomness quality by changing the number of accumulations by XOR. The goal of our method is to increase the throughput within the range of keeping the quality of output random numbers. In order to detect a sign of the loss of quality from the TRNG in parallel with random number generation, our method distinguishes random bitstrings to be tested from those to be output. The test bitstring is generated with the fewer number of accumulations than that of the output bitstring. The number of accumulations will be increased if the test bitstring fails in the randomness test. We designed and evaluated a prototype of on-line quality control system, using a Zynq-7000 FPGA SoC. The results indicate that the TRNG with the proposed method achieved 1.91-2.63 Mbits/s of throughput with 16 latches, following the change of the quality of output random numbers. The total number of logic elements in the prototype system with 16 latches was comparable to an existing system with 256 latches, without quality control capabilities.

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“…Gantel et al [31] proposed a validation and postprocessing platform for TRNGs. Test results are used to determine if the output of the TRNG needs to be postprocessed.…”

Section: Hardware Implementation Of Randomness Testmentioning

confidence: 99%

Design and Implementation of an On-Line Quality Control System for Latch-Based True Random Number Generator

FUJIEDA,

ICHIKAWA,

OYA

et al. 2023

IEICE Trans. Inf. & Syst.

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“…Therefore, it can be widely used in various GNU/Linux systems. A post-processing function based on XOR and fair coin operations is implemented [22][23][24][25] to ensure that the final output is unbiased and robust.…”

Section: Introductionmentioning

confidence: 99%

LETRNG—A Lightweight and Efficient True Random Number Generator for GNU/Linux Systems

Chen

Zhu

Tian

et al. 2023

Tsinghua Sci. Technol.

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Unpredictable and irreproducible digital keys are required to modulate security-related information in secure communication systems. True random number generators (TRNGs) rather than pseudorandom number generators (PRNGs) are required for the highest level of security. TRNG is a significant component in the digital security realm for extracting unpredictable binary bitstreams. Presently, most TRNGs extract high-quality "noise" from unpredictable physical random phenomena. Thus, these applications must be equipped with external hardware for collecting entropy and converting them into a random digital sequence. This study introduces a lightweight and efficient true random number generator (LETRNG) that uses the inherent randomness of a central processing unit (CPU) and an operating system (OS) as the source of entropy. We then utilize a lightweight post-processing method based on XOR and fair coin operation to generate an unbiased random binary sequence. Evaluations based on two famous test suites (NIST and ENT) show that LETRNG is perfectly capable of generating high-quality random numbers suitable for various GNU/Linux systems.

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An HLS implementation of on-the-fly randomness test for TRNGs

Oya

Fujieda

Ichikawa

2022

2022 Tenth International Symposium on Computing and Networking (CANDAR)

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A FPGA-Based Post-Processing and Validation Platform for Random Number Generators

Cited by 5 publications

References 10 publications

Design and Implementation of an On-Line Quality Control System for Latch-Based True Random Number Generator

Design and Implementation of an On-Line Quality Control System for Latch-Based True Random Number Generator

LETRNG—A Lightweight and Efficient True Random Number Generator for GNU/Linux Systems

An HLS implementation of on-the-fly randomness test for TRNGs

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