A formal, model-driven design flow for system simulation and multi-core implementation

Diallo, Papa Issa; Attarzadeh-Niaki, Seyed-Hosein; Robino, Francesco; Sander, Ingo; Champeau, Joël; Öberg, Johnny

doi:10.1109/sies.2015.7185067

Cited by 2 publications

(3 citation statements)

References 13 publications

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“…63 In a separate design flow, ForSyDe-XML models are generated by an MDE modeling tool from which simulatable ForSyDe-SystemC code is generated. 34…”

Section: Realizing In An Industrial Languagementioning

confidence: 99%

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An extensible modeling methodology for embedded and cyber-physical system design

Attarzadeh-Niaki

Sander

2016

SIMULATION

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models are important tools to manage the increasing complexity of system design. The choice of a modeling language for constructing models governs what types of systems can be modeled, and which subsequent design activities can be performed. This is especially true for the area of embedded electronic and cyber-physical system design, which poses several challenging requirements of modeling and design methodologies. This article argues that the Formal System Design (ForSyDe) methodology with the necessary presented extensions fulfills these requirements, and thus qualifies for the design of tomorrow’s systems. Based on the theory of models of computation and the concept of process constructors, heterogeneous models are captured in ForSyDe with formal semantics. A refined layer of the formalism is introduced to make its denotational-style semantics easy to implement on top of commonly used imperative languages, and an open-source realization on top of the IEEE standard language SystemC is presented. The introspection mechanism is introduced to automatically export an intermediate representation of the constructed models for further analysis/synthesis by external tools. Flexibility and extensibility of ForSyDe is emphasized by integrating a new timed model of computation without central synchronization, and by providing mechanisms for integrating foreign models, parallel and distributed simulation, modeling adaptive, data-parallel, and non-deterministic systems. A set of ForSyDe features is demonstrated in practice, and compared with similar approaches using a running example and two relevant case studies.

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“…63 In a separate design flow, ForSyDe-XML models are generated by an MDE modeling tool from which simulatable ForSyDe-SystemC code is generated. 34…”

Section: Realizing In An Industrial Languagementioning

confidence: 99%

“…However, our proposed MF can be integrated with MDE methods as presented. 34 Dedicated methods. Dedicated modeling techniques have been developed by the design automation community to address the specific modeling requirements of embedded and CPS design.…”

Section: Related Workmentioning

confidence: 99%

An extensible modeling methodology for embedded and cyber-physical system design

Attarzadeh-Niaki

Sander

2016

SIMULATION

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“…It also provides flexibility, easy accommodation of changes which improves the scalability of communication architecture and power efficiency of complex SoCs. NoC provides a clear demarcation between computation and communication in MPSoC [7]. It significantly reduces wire routing congestion and avoids timing closure issues in a SoC thereby increasing efficiency and high-performance interconnection.…”

Section: Introductionmentioning

confidence: 99%

Hardware Trojan Detection and Mitigation in NoC using Key authentication and Obfuscation Techniques

et al. 2022

EMITTER Int'l J. of Engin. Technol.

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Today's Multiprocessor System-on-Chip (MPSoC) contains many cores and integrated circuits. Due to the current requirements of communication, we make use of Network-on-Chip (NoC) to obtain high throughput and low latency. NoC is a communication architecture used in the processor cores to transfer data from source to destination through several nodes. Since NoC deals with on-chip interconnection for data transmission, it will be a good prey for data leakage and other security attacks. One such way of attacking is done by a third-party vendor introducing Hardware Trojans (HTs) into routers of NoC architecture. This can cause packets to traverse in wrong paths, leak/extract information and cause Denial-of-Service (DoS) degrading the system performance. In this paper, a novel HT detection and mitigation approach using obfuscation and key-based authentication technique is proposed. The proposed technique prevents any illegal transitions between routers thereby protecting data from malicious activities, such as packet misrouting and information leakage. The proposed technique is evaluated on a 4x4 NoC architecture under synthetic traffic pattern and benchmarks, the hardware model is synthesized in Cadence Tool with 90nm technology. The introduced Hardware Trojan affects 8% of packets passing through infected router. Experimental results demonstrate that the proposed technique prevents those 10-15% of packets infected from the HT effect. Our proposed work has negligible power and area overhead of 8.6% and 2% respectively.

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A formal, model-driven design flow for system simulation and multi-core implementation

Cited by 2 publications

References 13 publications

An extensible modeling methodology for embedded and cyber-physical system design

An extensible modeling methodology for embedded and cyber-physical system design

Hardware Trojan Detection and Mitigation in NoC using Key authentication and Obfuscation Techniques

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