A fine process control on the via hole of multilevel interconnection

Saito, Shuichi; Takenaka, Nobuyuki; Ohnishi, S.; Ayukawa, A.; Miki, Katsuhiko; Sakiyama, K.

doi:10.1109/vmic.1989.78005

Cited by 2 publications

(2 citation statements)

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“…On the broader subject of elevation of via-resistances, some other causes have already been well-documented, and they include residue from dry-etch of the via (Saito et al, 1989), underlying metals corrosion by F (Dai et al, 2001), ambient oxidation of constituent films (Qin et al, 2005), and voids from electromigration; however, the correlation with oxide impurities in the IMD has not yet been reported.…”

Section: Introductionmentioning

confidence: 99%

Oxide Impurities in Silicon Oxide Intermetal Dielectrics and Their Potential to Elevate Via-Resistances

Qin¹,

Alldredge²,

Heleotes³

et al. 2014

Microsc Microanal

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Silicon oxide used as an intermetal dielectric (IMD) incorporates oxide impurities during both its formation and subsequent processing to create vias in the IMD. Without a sufficient degassing of the IMD, oxide impurities released from the IMD during the physical vapor deposition (PVD) of the glue layer of the vias had led to an oxidation of the glue layer and eventual increase of the via resistances, which correlated with the O-to-Si atomic ratio of the IMD being ~10% excessive as verified by transmission electron microscopy (TEM) analysis. A vacuum bake of the IMD was subsequently implemented to enhance outgassing of the oxide impurities in the IMD before the glue layer deposition. The implementation successfully reduced the via resistances to an acceptable level.

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Section: Introductionmentioning

confidence: 99%

Oxide Impurities in Silicon Oxide Intermetal Dielectrics and Their Potential to Elevate Via-Resistances

Qin¹,

Alldredge²,

Heleotes³

et al. 2014

Microsc Microanal

View full text Add to dashboard Cite

show abstract

“…High contact-resistance is a commonly encountered issue in semiconductor devices, which can significantly compromise device performance and lead to yield losses. The causes of this problem can include stress-induced voiding 1 , RIE-induced contact degradation 2 , underlying metals corrosion 3 , ambient oxidation of constituent films 4 , and voids from electromigration.…”

mentioning

confidence: 99%