A Ferroelectric FET-Based Processing-in-Memory Architecture for DNN Acceleration

Long, Yun; Kim, Dae Hyun; Lee, Edward; Saha, Priyabrata; Mudassar, Burhan Ahmad; She, Xueyuan; Khan, Asif Islam; Mukhopadhyay, Saibal

doi:10.1109/jxcdc.2019.2923745

Cited by 53 publications

(33 citation statements)

References 27 publications

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“…When the result of sense amplifier for CBL is 1, the CBL peripheral sends the partial sum, 1, to the H-NoC router and pre-discharges the CBL. The H-NoC connects the synaptic arrays, accumulates the partial sums, and sends the VMM result to the neuron module (Long et al, 2019 ).…”

Section: Hardware Architecturementioning

confidence: 99%

MONETA: A Processing-In-Memory-Based Hardware Platform for the Hybrid Convolutional Spiking Neural Network With Online Learning

et al. 2022

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We present a processing-in-memory (PIM)-based hardware platform, referred to as MONETA, for on-chip acceleration of inference and learning in hybrid convolutional spiking neural network. MONETAuses 8T static random-access memory (SRAM)-based PIM cores for vector matrix multiplication (VMM) augmented with spike-time-dependent-plasticity (STDP) based weight update. The spiking neural network (SNN)-focused data flow is presented to minimize data movement in MONETAwhile ensuring learning accuracy. MONETAsupports on-line and on-chip training on PIM architecture. The STDP-trained convolutional neural network within SNN (ConvSNN) with the proposed data flow, 4-bit input precision, and 8-bit weight precision shows only 1.63% lower accuracy in CIFAR-10 compared to the STDP accuracy implemented by the software. Further, the proposed architecture is used to accelerate a hybrid SNN architecture that couples off-chip supervised (back propagation through time) and on-chip unsupervised (STDP) training. We also evaluate the hybrid network architecture with the proposed data flow. The accuracy of this hybrid network is 10.84% higher than STDP trained accuracy result and 1.4% higher compared to the backpropagated training-based ConvSNN result with the CIFAR-10 dataset. Physical design of MONETAin 65 nm complementary metal-oxide-semiconductor (CMOS) shows 18.69 tera operation per second (TOPS)/W, 7.25 TOPS/W and 10.41 TOPS/W power efficiencies for the inference mode, learning mode, and hybrid learning mode, respectively.

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Section: Hardware Architecturementioning

confidence: 99%

MONETA: A Processing-In-Memory-Based Hardware Platform for the Hybrid Convolutional Spiking Neural Network With Online Learning

et al. 2022

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“…al. [19] and the SIGMA [26] accelerator for sparse computation. A detail design of the hybrid PIM is beyond the scope of this paper.…”

Section: Architectural Considerationsmentioning

confidence: 99%

“…Figure 10 shows the layer-wise distribution of protected and total computations. The throughput and efficiency are estimated considering the PIM [19] and sparse convolution accelerator modules [26], and the layer-wise OPs distribution ( Table 2). In ResNet18, 1% protected parameters translates to a 4% computational overhead.…”

Section: Architectural Considerationsmentioning

confidence: 99%

“…This material is based on the work supported by the E2CDA program of National Science Foundation (CCF 1740197) and Semiconductor Research Corporation (NCORE 2762.003). Table 2: Performance Comparison to a Baseline PIM design [19] and Overhead Analysis.…”

Section: Acknowledgementmentioning

confidence: 99%

“…In particular, our approach shows significant improvement over baselines, namely, device-variation-aware training [21] and gradient-based protection [12], for hardware friendly DNN models like MobileNet-V2. We evaluate overheads of Hessian-driven parameter protection considering existing PIM and digital accelerators for sparse convolution [19,26]. The analysis shows negligible throughput overhead, but 7.5%,19.5%, and 4.9% reduction in power-efficiency compared to the baseline PIM design [26] for ResNet, MobileNet, and DenseNet, respectively.…”

Section: Introductionmentioning

confidence: 99%

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Hessian-driven unequal protection of DNN parameters for robust inference

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Mukhopadhyay

2020

Proceedings of the 39th International Conference on Computer-Aided Design

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Thin‐Film Ferroelectrics

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non-centrosymmetric structures which can possess a spontaneous electric polarization which can be controlled using applied electric fields (Figure 1). Ferroelectrics themselves are inherently hierarchical materials-wherein picometer ionic displacements give rise to polarization which can collectively extend over millimeters or self-organize into complex mesoscopic structures or collectively reorient under applied stimuli (e.g., electric fields, temperature, or stress). Understanding these complex behaviors necessitates a multilevel approach, wherein atomistic, microscopic, mesoscopic, and macroscopic properties are studied in concert. Parallel advances in synthesis, characterization, and simulation have enabled such multimodal studies and provided a methodology through which a multitude of ferroelectric functionalities can now be achieved and studied.The promise of utilizing these functionalities in a number of applications kick-started the modern era of ferroelectric research in the mid-20th century. [1] Looking further back, in the 1920s, the ability to switch the polarization of sodium potassium tartrate tetrahydrate (commonly known as Rochelle salt) was first observed, along with dielectric and piezoelectric anomalies near the ferroelectric transition-now called the Curie point. In the 1940s, as part of the accelerated research push associated with World War II, ferroelectric BaTiO 3 was discovered by accident. When modifying TiO 2 with BaO to enhance its dielectric properties, a record-high dielectric permittivity was discovered and subsequent studies demonstrated a hysteretic switchable polarization. This discovery ushered in a new understanding of ferroelectricity as more than a rare phenomenon associated with salts that contained hydrogen bonding, but rather as a phenomenon that could exist in simple oxides like perovskites. Over the subsequent decades, the number of ferroelectric compositions exploded, particularly within the perovskite oxides, introducing new chemistries including LiNbO 3 and the PbZr x Ti 1−x O 3 system. Meanwhile, theoretical descriptions of ferroelectricity were advanced through lattice-dynamical models invoking a soft-mode optical phonon. Studies of the piezoelectric, thermodynamic, and optical properties in ferroelectric ceramics allowed for their deployment in a number of applications including piezoelectric sensors and pyroelectric infrared detectors. By the 1960s, increased interest in using ferroelectric polarization for nonvolatile memory was driving research into Over the last 30 years, the study of ferroelectric oxides has been revolutionized by the implementation of epitaxial-thin-film-based studies, which have driven many advances in the understanding of ferroelectric physics and the realization of novel polar structures and functionalities. New questions have motivated the development of advanced synthesis, characterization, and simulations of epitaxial thin films and, in turn, have provided new insights and applications across the micro-, meso-, and macroscopic length sc...

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A Ferroelectric FET-Based Processing-in-Memory Architecture for DNN Acceleration

Cited by 53 publications

References 27 publications

MONETA: A Processing-In-Memory-Based Hardware Platform for the Hybrid Convolutional Spiking Neural Network With Online Learning

MONETA: A Processing-In-Memory-Based Hardware Platform for the Hybrid Convolutional Spiking Neural Network With Online Learning

Hessian-driven unequal protection of DNN parameters for robust inference

Thin‐Film Ferroelectrics

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