A Faithful Binary Circuit Model

Függer, Matthias; Najvirt, Robert; Nowak, Thomas; Schmid, Ulrich

doi:10.1109/tcad.2019.2937748

Cited by 11 publications

(22 citation statements)

References 19 publications

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“…Lemma 3 in [5], restated as Lemma 1 below, shows that strictly causal involution channels, characterized by strictly increasing, concave delay functions with ↑ (0) > 0 and ↓ (0) > 0, give raise 1 The original Involution Tool is accessible via https://github.com/oehlinscher/ InvolutionTool, our extended version is provided at https://github.com/oehlinscher/ CDMTool.…”

Section: Involution Delay Model Basicsmentioning

confidence: 99%

“…For an "outermost" input port of a circuit, we can just require that the connected gate must have a threshold voltage matching the external input signal, such that ↑ = ↓ = 0 for the dangling ℎ component. As a consequence, all the results and all the machinery developed for the original IDM [5] could, in principle, be also applied to circuits modeled with CIDM channels.…”

Section: Proof Consider An Input Signal Consisting Of a Single Negative Pulse As Depicted Inmentioning

confidence: 99%

“…Still, Függer et al [4] showed that none of the existing delay models, including DDM, can reliably predict the propagation of glitches. Függer et al [5] thus introduced the Involution Delay Model (IDM), with the distinguishing property that the delay functions for rising ( ↑ ) and falling ( ↓ ) transitions form an involution, i.e., − ↑ (− ↓ ( )) = , which enables faithful short pulse propagation. The Involution Tool [15], a simulation framework utilizing a digital simulation suite, has been used to confirm the models accuracy.…”

Section: Introduction and Contextmentioning

confidence: 99%

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Proceedings of the 2021 Great Lakes Symposium on VLSI

2021

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We introduce the Composable Involution Delay Model (CIDM) for fast and accurate digital simulation. It is based on the Involution Delay Model (IDM) [Függer et al., IEEE TCAD 2020], which has been shown to be the only existing candidate model for faithful glitch propagation. The IDM, however, has shortcomings that limit its applicability. Our CIDM thus reduces the characterization effort by allowing independent discretization thresholds, improves composability and increases the modeling power by exposing canceled pulse trains at the gate interconnect. We formally show that, despite these improvements, the CIDM still retains the IDM's faithfulness.

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Section: Involution Delay Model Basicsmentioning

confidence: 99%

Section: Proof Consider An Input Signal Consisting Of a Single Negative Pulse As Depicted Inmentioning

confidence: 99%

Section: Introduction and Contextmentioning

confidence: 99%

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Proceedings of the 2021 Great Lakes Symposium on VLSI

2021

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“…For this purpose dynamic timing simulations, which predict time and direction of a gate's output transitions based on time and direction of its input transitions, are mandatory. Although several approaches are currently available (see Section II), Függer et al [3] revealed, that solely the Involution Delay Model (IDM) is able to predict the behavior of a circuit solving the short pulse filtration problem. Recently Öhlinger et al [4] practically applied the IDM to basic circuits, however, primarily to evaluate the accuracy of their introduced simulation framework.…”

Section: Introductionmentioning

confidence: 99%

“…In this section we want to provide a short overview over existing delay prediction methods, whereat we will focus in greater detail on the basics of the Involution Delay Model (IDM). For more details the interested reader is referred to the original publication [3].…”

Section: Introductionmentioning

confidence: 99%