A Dual-Wordline 6T SRAM Computing-In-Memory Macro Featuring Full Signed Multi-Bit Computation for Lightweight Networks

Gu, Zupei; Dou, Shukao; You, Heng; Zhan, Yi; Qiao, Shushan; Zhou, Yumei

doi:10.1109/access.2024.3369057

IEEE Access

2024

DOI: 10.1109/access.2024.3369057

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A Dual-Wordline 6T SRAM Computing-In-Memory Macro Featuring Full Signed Multi-Bit Computation for Lightweight Networks

Zupei Gu,

Shukao Dou,

Heng You

et al.

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A Dual-Wordline 6T SRAM Computing-In-Memory Macro Featuring Full Signed Multi-Bit Computation for Lightweight Networks

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References 33 publications

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