A Dual-mode SAR ADC Enabling On-chip Detection of Off-chip Power Noise Measurements by Attackers

Wadatsumi, Takuya; Miki, Takuji; Nagata, Michio

doi:10.7567/ssdm.2020.l-9-04

Cited by 1 publication

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“…A dual-mode SAR ADC enables on-chip wide-bandwidth noise monitoring thanks to the proposed front-end sensing circuit and also applies the two-step sampling scheme to detect the insertion of unexpected devices on power lines and to characterize the resultant interference. It is also shown that the proposed noise monitoring resolves the series resistors inserted into a power supply line for current sensing 11) and the parallel capacitances parasitic to voltage probing.…”

Section: Introductionmentioning

confidence: 99%

A dual-mode successive approximation register analog to digital converter to detect malicious off-chip power noise measurement attacks

Wadatsumi

Miki

Nagata

2021

Jpn. J. Appl. Phys.

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An on-chip noise monitor using a dual-mode analog to digital converter (ADC) is developed to detect the insertion of off-chip components as malicious attempts of power noise measurement attacks. A two-step sampling scheme selecting either synchronous or asynchronous clocking enables both real-time monitoring and high-resolution diagnosis of power supply noise, respectively. The monitor detects the change in power-line impedance and assumes the happening of physical contacts by an attacker’s device. A wide-band ADC with the bandwidth of 1 GHz facilitates the analysis of on-chip captured waveforms and the recognition of potentially inserted devices. Fabricated in 65 nm CMOS, the on-chip noise monitor is examined for the detectability of series resistors as well as parallel capacitors that are intentionally inserted on power lines. The experiments demonstrated the detection of a power current sensor in series to power lines, and also the attachment of an oscilloscope probe, through the analysis of on-chip captured power noise waveforms.

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Section: Introductionmentioning

confidence: 99%