A digital vision chip specialized for high-speed target tracking

Komuro, Takashi; Ishii, Idaku; Ishikawa, Masatoshi; Yoshida, Akitoshi

doi:10.1109/ted.2002.807255

Cited by 124 publications

(60 citation statements)

References 14 publications

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“…A target tracking task by high-speed vision sensors (e.g. [13]) was modeled as follows: The state vector represents the position and velocity of the target x ≡ (x, y, z,ẋ,ẏ,ż) T , and its dynamics is given by…”

Section: Resultsmentioning

confidence: 99%

A sensor selection method considering communication delays

Kagami

Ishikawa

2006

Electron. Comm. Jpn. Pt. III

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Abstract-A sensor selection method for distributed real-time sensing is proposed where the effect of communication delays is taken into account. First, a multi-sensor fusion algorithm that allows communication delays is proposed. This method takes advantage of the information form of Kalman filtering in order to maintain scalability with the number of sensors. Based on this algorithm, an algorithm is developed that calculates mutual information between an observation and the state to be estimated, which provides a criterion for sensor selection. Simulated results of a target-tracking task show its effectiveness.

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Section: Resultsmentioning

confidence: 99%

A sensor selection method considering communication delays

Kagami

Ishikawa

2006

Electron. Comm. Jpn. Pt. III

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“…The ASPA processor [23] and the design proposed by Komuro et al [24] are the examples of this kind of implementations.…”

Section: Pixel-parallel Processor Arraysmentioning

confidence: 99%

Performance analysis of massively parallel embedded hardware architectures for retinal image processing

Nieto

Brea

Vilariño

et al. 2011

J Image Video Proc.

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This paper examines the implementation of a retinal vessel tree extraction technique on different hardware platforms and architectures. Retinal vessel tree extraction is a representative application of those found in the domain of medical image processing. The low signal-to-noise ratio of the images leads to a large amount of lowlevel tasks in order to meet the accuracy requirements. In some applications, this might compromise computing speed. This paper is focused on the assessment of the performance of a retinal vessel tree extraction method on different hardware platforms. In particular, the retinal vessel tree extraction method is mapped onto a massively parallel SIMD (MP-SIMD) chip, a massively parallel processor array (MPPA) and onto an field-programmable gate arrays (FPGA).

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“…The near sensor image processing (NSIP) concept [20] then allowed to process gray level images. Now, the deep sub-micron level of CMOS technology allows to put more and more powerful processing circuitry aside the photo receptors while preserving good acquisition performance and resolution [26,40]. The circuit used in our work was designed by Bernard at ENSTA and fabricated using 0.35 lm technology: Pvlsar34 is a 200 9 200 retina, with an elementary digital processor and 48 bits of memory within every pixel.…”

Section: Programmable Artificial Retinamentioning

confidence: 99%

High performance motion detection: some trends toward new embedded architectures for vision systems

Lacassagne

Manzanera

Denoulet

et al. 2008

J Real-Time Image Proc

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The goal of this article is to compare some optimised implementations on current high performance platforms in order to highlight architectural trends in the field of embedded architectures and to get an estimation of what should be the components of a next generation vision system. We present some implementations of robust motion detection algorithms on three architectures: a general purpose RISC processor-the PowerPC G4-a parallel artificial retina dedicated to low level image processingPvlsar34-and the Associative Mesh, a specialized architecture based on associative net. To handle the different aspects and constraints of embedded systems, execution time and power consumption of these architectures are compared.

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A digital vision chip specialized for high-speed target tracking

Cited by 124 publications

References 14 publications

A sensor selection method considering communication delays

A sensor selection method considering communication delays

Performance analysis of massively parallel embedded hardware architectures for retinal image processing

High performance motion detection: some trends toward new embedded architectures for vision systems

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