A digital phase-locked-loop for synchronization of single-phase sources with the utility grid

Braatz, Luciano; Severo, S. L. S.; Lerm, A.A.P.; Ciarelli, W. de F.

doi:10.1109/ptc.2013.6652406

Cited by 3 publications

(2 citation statements)

References 6 publications

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“…8. The determination of the voltage Vc is performed by a digital phase-locked loop (PLL) as proposed by the authors in [5]. From the previous experience of the authors on this topic a digital PLL demonstrates more robustness if compared with other techniques like Park and Clark decomposition when the involved signals have a significant distortion on their waveforms.…”

Section: The Proposed Electronic Synchronizermentioning

confidence: 99%

Synchronizing microgrids to the utility through a series compensator

Lerm

Braatz

Cruz

et al. 2014

2014 Power Systems Computation Conference

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This paper presents a novel approach to deal with the synchronization of microgrids to the main grid. It is based on the use of a power electronic device derived from the original concept of the SSSC (Static Synchronous Series Compensator). The proposed scheme considers the connection of this device at the point-of-interconnection (POI) of the microgrid to the low voltage side of the substation transformer (main grid). The voltage originated by the series compensator is fully controlled in both amplitude and phase angle ensuring the conditions for the synchronization. The proposed scheme allows a smooth transition between the islanded operation and the grid connected operation overcoming typical problems observed when conventional methods are applied. Numerical results obtained for a hypothetical microgrid show the effectiveness of the proposed approach.

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Section: The Proposed Electronic Synchronizermentioning

confidence: 99%

Synchronizing microgrids to the utility through a series compensator

Lerm

Braatz

Cruz

et al. 2014

2014 Power Systems Computation Conference

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“…Notch filters are proposed for this purpose. Moving Average Filtering technique (MAF) is widely used because of its low required computations, simple digital implementation and effectiveness [4]- [11]. Nonetheless, it limits the response speed, considerably.…”

Section: Introductionmentioning

confidence: 99%

A frequency adaptive single-phase phase-locked loop with harmonic rejection

Sagha

Ledwich

Ghosh

et al. 2014

IECON 2014 - 40th Annual Conference of the IEEE Industrial Electronics Society

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An improved Phase-Locked Loop (PLL) for extracting phase and frequency of the fundamental component of a highly distorted grid voltage is presented. The structure of the single-phase PLL is based on the Synchronous Reference Frame (SRF) PLL and uses an All Pass Filter (APF) to generate the quadrature component from the single phase input voltage. In order to filter the harmonic content, a Moving Average Filter (MAF) is used, and performance is improved by designing a lead compensator and also a feed-forward compensator. The simulation results are compared to show the improved performance with feed-forward. In addition, the frequency dependency of MAF is dealt with by a proposed method for adaption to the frequency. This method changes the window size based on the frequency on a sample-by-sample basis. By using this method, the speed of resizing can be reduced in order to decrease the output ripples caused by window size variations.

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