A Digital ISFET Sensor with In-Pixel ADC

Abstract

This paper presents a novel ISFET architecture with in-pixel ADC for large-scale integration and on-chip computational capabilities. Each pixel is composed by a comparator connected to a set of memory elements, storing in-pixel each conversion. Using this sensing scheme, the entire frame of ISFET pixels is acquired and stored in one single ADC cycle, eliminating the need for global or column-level ADCs and making this architecture scalable to larger arrays without instrumentation overhead. To enable compensation of ISFET non-idealities such as trapped charge, a novel gate-bootstrapping mechanism is introduced, enhancing the ADC dynamic range without additional circuitry and accommodating a trapped charge compensation range of 4.45 V. Fabricated in standard 180nm CMOS technology, the system is composed by a 16x16 ISFET array, a global DAC and a Digital Control Unit that enables operation and off-chip communication. The entire frame is acquired in 51.2 µs with a pixel power consumption of 10.15 µW , while storing the result in-pixel and eliminating the need for off-chip memories.

A differential p-ISFET based on-chip pH sensor with substrate based drift reset capability

“…Common non-idealities in the ISFET cause variations in the electrical characteristics of each device [9]. This corrupts the readout of an ISFET pH sensor causing errors at the output.…”

“…Unmodified CMOS-ISFET based pH sensing provide a portable, miniaturized, robust, fast responsive method of pH detection for biomedical applications [6]. The advantage of such systems means integrated circuits and ISFETs co-exist on a single chip, allowing advantages such as wafer scale processing, scalability, miniaturization, low cost, mass production and integration with well-known circuit techniques [7][8][9]. More recent advances in pH sensors based on ISFETs include increasing the sensitivity using dual gate architecture which utilizes the high capacitive multiplication factor between the front gate and back gate to get a sensitivity enhancement or other architectures [10][11][12][13][14].…”

ISFET Pixel Array With Selectable Sensitivity and Bulk-Based Offset-Drift Nullification Capability for Reduction of Non-Ideality Effects

“…As discussed in excellent detail in [12], arrays of ISFET pixels enable monitoring and control of performing multiple reactions simultaneously which are needed for applications such as genetic sequencing and extracellular imaging [13][14][15]. Also, they allow spatial averaging to improve readout resolution and give the advantage of sensor redundancy [9].…”

Circuit Techniques to Improve Low-Light Characteristics and High-Accuracy Evaluation System for CMOS Image Sensor

“…In particular, from the perspective of surveillance and security, improved low-light characteristics that enable clear images even in dark environments have become an important technology for image sensors in recent years. In order to process signals from pixels at high speed, such image sensor devices incorporate thousands of ADCs in the chip to enable high-speed digital output; of the available ADCs, pixel ADCs [15][16][17][18] and column ADCs [19][20][21][22][23][24][25][26][27][28][29] have been used as a way to achieve widely parallel operation. To achieve high resolution and low power consumption, a column ADC is the best choice, because a pixel ADC is disadvantageous in terms of power, heat, and mounting.…”