A design pattern language for engineering (parallel) software

Keutzer, Kurt; Massingill, Berna L.; Mattson, Timothy G.; Sanders, Beverly A.

doi:10.1145/1953611.1953620

Cited by 85 publications

(79 citation statements)

References 1 publication

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“…The patterns we discuss here are related to those identified in [7]. Two general strategies emerge for expressing arbitrary task graphs within other parallel models.…”

Section: Implementing Task Graphs Using Common Parallel Patternsmentioning

confidence: 79%

Executing Optimized Irregular Applications Using Task Graphs within Existing Parallel Models

Krieger

Strout

Roelofs

et al. 2012

2012 SC Companion: High Performance Computing, Networking Storage and Analysis

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Abstract-Many sparse or irregular scientific computations are memory bound and benefit from locality improving optimizations such as blocking or tiling. These optimizations result in asynchronous parallelism that can be represented by arbitrary task graphs. Unfortunately, most popular parallel programming models with the exception of Threading Building Blocks (TBB) do not directly execute arbitrary task graphs. In this paper, we compare the programming and execution of arbitrary task graphs qualitatively and quantitatively in TBB, the OpenMP doall model, the OpenMP 3.0 task model, and Cilk Plus. We present performance and scalability results for 8 and 40 core shared memory systems on a sparse matrix iterative solver and a molecular dynamics benchmark.

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“…The patterns we discuss here are related to those identified in [7]. Two general strategies emerge for expressing arbitrary task graphs within other parallel models.…”

Section: Implementing Task Graphs Using Common Parallel Patternsmentioning

confidence: 79%

Executing Optimized Irregular Applications Using Task Graphs within Existing Parallel Models

Krieger

Strout

Roelofs

et al. 2012

2012 SC Companion: High Performance Computing, Networking Storage and Analysis

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“…Although skeleton-based parallelization has clear benefits over other techniques (pragma-based techniques require annotations, new languages introduce a learning curve) [11], it is not been used widely in practice. The main reason for this is the limited applicability of the technique.…”

Section: Discussion and Future Workmentioning

confidence: 99%

“…Keutzer et al distinguish three solutions to the parallel programming problem [11]. The first two, automatic parallelization and new languages, have been applied to GPUs, but, according to the same authors, will not solve the problem.…”

Section: Related Workmentioning

confidence: 99%

Skeleton-based automatic parallelization of image processing algorithms for GPUs

Nugteren

Corporaal

Mesman

2011

2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation

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Abstract-Graphics Processing Units (GPUs) are becoming increasingly important in high performance computing. To maintain high quality solutions, programmers have to efficiently parallelize and map their algorithms. This task is far from trivial, leading to the necessity to automate this process.In this paper, we present a technique to automatically parallelize and map sequential code on a GPU, without the need for code-annotations. This technique is based on skeletonization and is targeted at image processing algorithms. Skeletonization separates the structure of a parallel computation from the algorithm's functionality, enabling efficient implementations without requiring architecture knowledge from the programmer. We define a number of skeleton classes, each enabling GPU specific parallelization techniques and optimizations, including automatic thread creation, on-chip memory usage and memory coalescing.Recently, similar skeletonization techniques have been applied to GPUs. Our work uses domain specific skeletons and a finergrained classification of algorithms. Comparing skeleton-based parallelization to existing GPU code generators in general, we potentially achieve a higher hardware efficiency by enabling algorithm restructuring through skeletons.In a set of benchmarks, we show that the presented skeletonbased approach generates highly optimized code, achieving high data throughput. Additionally, we show that the automatically generated code performs close or equal to manually mapped and optimized code. We conclude that skeleton-based parallelization for GPUs is promising, but we do believe that future research must focus on the identification of a finer-grained and complete classification.

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“…In the pursuit of quality and scalable parallel software, patterns for programming paradigms were developed [45] as well as a pattern language, called Our Pattern Language (OPL) [40]. These describe the computation and communication patterns in various parallel algorithms and therefore useful for designing and implementing scalable parallel applications.…”

Section: Related Workmentioning

confidence: 99%

Resilience Design Patterns: A Structured Approach to Resilience at Extreme Scale

Hukerikar

Engelmann

2017

JSFI

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Reliability is a serious concern for future extreme-scale high-performance computing (HPC) systems. Projections based on the current generation of HPC systems and technology roadmaps suggest the prevalence of very high fault rates in future systems. While the HPC community has developed various resilience solutions, application-level techniques as well as system-based solutions, the solution space remains fragmented. There are no formal methods and metrics to integrate the various HPC resilience techniques into composite solutions, nor are there methods to holistically evaluate the adequacy and efficacy of such solutions in terms of their protection coverage, and their performance & power efficiency characteristics. Additionally, few of the current approaches are portable to newer architectures and software environments that will be deployed on future systems. In this paper, we develop a structured approach to the design, evaluation and optimization of HPC resilience using the concept of design patterns. A design pattern is a general repeatable solution to a commonly occurring problem. We identify the problems caused by various types of faults, errors and failures in HPC systems and the techniques used to deal with these events. Each well-known solution that addresses a specific HPC resilience challenge is described in the form of a pattern. We develop a complete catalog of such resilience design patterns, which may be used by system architects, system software and tools developers, application programmers, as well as users and operators as essential building blocks when designing and deploying resilience solutions. We also develop a design framework that enhances a designer's understanding the opportunities for integrating multiple patterns across layers of the system stack and the important constraints during implementation of the individual patterns. It is also useful for defining mechanisms and interfaces to coordinate flexible fault management across hardware and software components. The resilience patterns and the design framework also enable exploration and evaluation of design alternatives and support optimization of the cost-benefit trade-offs among performance, protection coverage, and power consumption of resilience solutions. The overall goal of this work is to establish a systematic methodology for the design and evaluation of resilience technologies in extreme-scale HPC systems that keep scientific applications running to a correct solution in a timely and cost-efficient manner despite frequent faults, errors, and failures of various types.

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A design pattern language for engineering (parallel) software

Cited by 85 publications

References 1 publication

Executing Optimized Irregular Applications Using Task Graphs within Existing Parallel Models

Executing Optimized Irregular Applications Using Task Graphs within Existing Parallel Models

Skeleton-based automatic parallelization of image processing algorithms for GPUs

Resilience Design Patterns: A Structured Approach to Resilience at Extreme Scale

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