A Depletion-Mode a-IGZO TFT Shift Register With a Single Low-Voltage-Level Power Signal

Kim, Binn; Choi, Seung Chan; Lee, Soo-Yeon; Kuk, Seung‐Hee; Jang, Young-Soo; Kim, Chang-Dong; Han, Min−Koo

doi:10.1109/led.2011.2157989

Cited by 57 publications

(40 citation statements)

References 8 publications

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“…In fact, the combination of light duration at a certain intensity associated with zero bias value duration can be then optimized to achieve performance enhancement. 17 In summary, the electrical stability and device reliability under bias stress of devices demonstrate excellent performance after 7 months storage in dark. This is attributed to the effective blocking of atmospheric species diffusion to/ from IGZO provided by the parylene layer.…”

Section: à2mentioning

confidence: 92%

“…16 As will be seen in this work, depletion-mode TFTs can be good candidates for display applications, owing to their reliability under illumination. 17 This paper reports our findings on how the combination of parylene passivation and depletion-mode operation can improve the stability of IGZO TFTs under both bias and illumination stress. By using non-coated devices as reference, degradation mechanisms are identified.…”

mentioning

confidence: 98%

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Improving positive and negative bias illumination stress stability in parylene passivated IGZO transistors

Kiazadeh

Gomes

Barquinha

et al. 2016

Applied Physics Letters

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The impact of a parylene top-coating layer on the illumination and bias stress instabilities of indium-gallium-zinc oxide thin-film transistors (TFTs) is presented and discussed. The parylene coating substantially reduces the threshold voltage shift caused by continuous application of a gate bias and light exposure. The operational stability improves by 75%, and the light induced instability is reduced by 35%. The operational stability is quantified by fitting the threshold voltage shift with a stretched exponential model. Storage time as long as 7 months does not cause any measurable degradation on the electrical performance. It is proposed that parylene plays not only the role of an encapsulation layer but also of a defect passivation on the top semiconductor surface. It is also reported that depletion-mode TFTs are less sensitive to light induced instabilities. This is attributed to a defect neutralization process in the presence of free electrons.

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Section: à2mentioning

confidence: 92%

mentioning

confidence: 98%

Improving positive and negative bias illumination stress stability in parylene passivated IGZO transistors

Kiazadeh

Gomes

Barquinha

et al. 2016

Applied Physics Letters

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“…A single stage of the scan driver consists of an input module, an inverter module and an AC-DC type output module. T1 and T2 are connected in series to form the input module, and T3 is a feedback TFT to cut off the leakage current of T2 when the coupling capacitance C2 bootstraps [10]. T4, T4A, T5, T6, T7, T8 and C1 form the clock-controlled inverter to generate QB signal which is the inverse signal of Q. T9, T10, T11, T12 and the coupling capacitance C2 form the AC-DC type output module via which the signals of COUT and OUT are generated.…”

Section: Proposed Scan Drivermentioning

confidence: 99%

“…There are a few scan driver circuits integrated by MOTFTs using two negative power sources [7][8][9], series connected twotransistors (STT) structure with a feedback TFT [10], or floating gate method [11] to solve the problems induced by the leakage current at V gs = 0. In this paper, we focus on optimizing the output module of scan driver since the output module occupies most of the power consumption and restricts the speed of the scan driver.…”

Section: Introductionmentioning

confidence: 99%

A low-power scan driver employing IZO TFTs including an AC–DC type output module

et al. 2015

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“…Kim et al reported new shift register structures that work normally with the depletion-mode oxide TFTs [6,7]. We also developed a new circuit structure to reduce the power consumption even though the TFTs have negative V T s [8].…”

Section: Introductionmentioning

confidence: 99%

A shift register for depletion-mode oxide TFTs with very low power consumption

Park

Kim

Jang

et al. 2013

IEICE Electron. Express

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Abstract:The shift register comprised of metal-oxide thin-film transistors (TFTs) is apt to exhibit anomalously high power consumption because the oxide TFT often has depletion-mode characteristic. We have developed a new shift register circuit in which one of the pull-down TFTs is controlled by capacitive coupling with the clock signal and the input carry signal. Employing this structure, the TFTs with non-zero V DS are always turned off with negative V GS . As a result, unnecessary current through the TFTs is eliminated and the power consumption of the new circuit decreases to the half of our previous one when the threshold voltage of the TFT is À5 V.

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A Depletion-Mode a-IGZO TFT Shift Register With a Single Low-Voltage-Level Power Signal

Cited by 57 publications

References 8 publications

Improving positive and negative bias illumination stress stability in parylene passivated IGZO transistors

Improving positive and negative bias illumination stress stability in parylene passivated IGZO transistors

A low-power scan driver employing IZO TFTs including an AC–DC type output module

A shift register for depletion-mode oxide TFTs with very low power consumption

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