1998
DOI: 10.1016/s0924-4247(98)00073-9
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A dedicated micromachining technology for high-aspect-ratio millimetre-wave circuits

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Cited by 22 publications
(8 citation statements)
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“…The RCI-bandstop filters have been micro-machined on a thin silicon oxide/nitride membrane in order to minimize the dielectric losses (figure 3). The technological process [7] consists in: (1) depositing a bi-layered thin dielectric film on silicon substrate (this film is composed of a 0.8 µm-thick layer of SiO 2 below a 0.6 µm-thick layer of Si 3 N 3.8 ); then (2) patterning the gold layer on the Si 3 N 3.8 top layer for filter realization and finally, (3) removing back-side specified silicon regions under the circuits. The CPWcharacteristic impedance used here is 70 Ω in order to accommodate the slot widths with the resolution of the technological process.…”
Section: Rci-bandstop Filtermentioning
confidence: 99%
“…The RCI-bandstop filters have been micro-machined on a thin silicon oxide/nitride membrane in order to minimize the dielectric losses (figure 3). The technological process [7] consists in: (1) depositing a bi-layered thin dielectric film on silicon substrate (this film is composed of a 0.8 µm-thick layer of SiO 2 below a 0.6 µm-thick layer of Si 3 N 3.8 ); then (2) patterning the gold layer on the Si 3 N 3.8 top layer for filter realization and finally, (3) removing back-side specified silicon regions under the circuits. The CPWcharacteristic impedance used here is 70 Ω in order to accommodate the slot widths with the resolution of the technological process.…”
Section: Rci-bandstop Filtermentioning
confidence: 99%
“…The membrane is then released through an anisotropic etching of silicon in potassium hydroxyde solution (KOH) allowing properties similar to those obtained in a free space [9]. More details on the technological process could be found in [10].…”
Section: Technological Process Descriptionmentioning
confidence: 99%
“…Figure 2 displays the cross-sectional view of the CPWG micromachined on a thin silicon oxide/nitride membrane. The technological process [7] consists of the following steps: (i) depositing a bilayered thin dielectric film on silicon substrate (this film is composed of a 0.8-m-thick layer of SiO 2 under a 0.6-mthick layer of Si 3 N 3.8 ), then (ii) patterning the gold layer on the Si 3 N 3.8 top layer for filter realization, and finally (iii) removing specific backside silicon regions under the circuits. The CPWG characteristic impedance used here is 70⍀ in order to accommodate the slot widths with the resolution of the technological pro- …”
Section: Introductionmentioning
confidence: 99%