A customized graph neural network model for guiding analog IC placement

Li, Yaguang; Lin, Yishuang; Madhusudan, Meghna; Sharma, Arvind Kumar; Xu, Wenbin; Sapatnekar, Sachin S.; Harjani, Ramesh; Hu, Jiang

doi:10.1145/3400302.3415624

Cited by 48 publications

(12 citation statements)

References 20 publications

(62 reference statements)

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“…MLParest [205] shows that non-graph based method (e.g., random forest) can be used to estimate interconnect parasitics, whereas the lack of placement information may cause large variations in predictions. PEA [137] focuses on how circuit placement affects its performance, which problem is formulated as a classification problem. A customized GNN model, which can transfer knowledge across different topologies of the same circuit type, takes a placement solution as input, and predicts whether the post-routing performance meets certain specifications.…”

Section: Circuit Analysismentioning

confidence: 99%

A Survey of Machine Learning for Computer Architecture and Systems

Wu,

Xie

2021

Preprint

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It has been a long time that computer architecture and systems are optimized to enable efficient execution of machine learning (ML) algorithms or models. Now, it is time to reconsider the relationship between ML and systems, and let ML transform the way that computer architecture and systems are designed. This embraces a twofold meaning: the improvement of designers' productivity, and the completion of the virtuous cycle. In this paper, we present a comprehensive review of work that applies ML for system design, which can be grouped into two major categories, ML-based modelling that involves predictions of performance metrics or some other criteria of interest, and ML-based design methodology that directly leverages ML as the design tool. For ML-based modelling, we discuss existing studies based on their target level of system, ranging from the circuit level to the architecture/system level. For ML-based design methodology, we follow a bottom-up path to review current work, with a scope of (micro-)architecture design (memory, branch prediction, NoC), coordination between architecture/system and workload (resource allocation and management, data center management, and security), compiler, and design automation. We further provide a future vision of opportunities and potential directions, and envision that applying ML for computer architecture and systems would thrive in the community. CCS Concepts: • Computing methodologies → Machine learning; • Computer systems organization → Architectures; • General and reference → Surveys and overviews.

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Section: Circuit Analysismentioning

confidence: 99%

A Survey of Machine Learning for Computer Architecture and Systems

Wu,

Xie

2021

Preprint

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“…Bayesian Optimization [95] routing VAE [174] Post-layer Evaluation electromagnetic properties estimation GNN [165] performance prediction SVM, random forest, NN [84] CNN [94] GNN [83] deploying the model. Thus, ML-based methods have more potential in large scale applications at the cost of increased training costs.…”

Section: 34mentioning

confidence: 99%

“…Then a third coordinate channel is added to the image to form 3D inputs. Li et al [83] propose a customized GNN for performance prediction. They report a higher accuracy than the CNN-based method [94].…”

Section: Machine Learning For Electronic Design Automation: a Survey ...mentioning

confidence: 99%

Machine Learning for Electronic Design Automation: A Survey

Huang

et al. 2021

Preprint

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With the down-scaling of CMOS technology, the design complexity of very large-scale integrated (VLSI) is increasing. Although the application of machine learning (ML) techniques in electronic design automation (EDA) can trace its history back to the 90s, the recent breakthrough of ML and the increasing complexity of EDA tasks have aroused more interests in incorporating ML to solve EDA tasks. In this paper, we present a comprehensive review of existing ML for EDA studies, organized following the EDA hierarchy.

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“…Within and across these building blocks, geometric constraints, including symmetries along multiple axes, are inferred. Electrical constraints are generated by translating performance specifications to layout constraints: techniques developed to date include those in [4,5], and further enhancements are currently under investigation. Design rule abstraction and parameterized primitive layout generation: ALIGN defines a systematic method for translating a complex design rule manual into a simplified grid representation, appended with Boolean constraints as needed.…”

Section: Introductionmentioning

confidence: 99%