A small-area digital-to-analogue converter (DAC) in 45 nm SOI CMOS technology is presented that is based on a centrally located, static current-mode DAC, the output current of which is fed to an array of distributed, dynamically-refreshed small-area DACs. Owing to the dynamic operation of the distributed DACs, a single array element can be made as small as 8 × 8 mm. The measured retention time of a single array element with 7-bit resolution is 3 ms at a temperature of 1258C.Introduction: The large number of available transistors in modern technologies allows circuit designers to build ever more complex circuits with an increasing number of adjustable coefficients and parameters. To implement a 'measure-all-adjust-all strategy', area-efficient DAC arrays are required. A typical application of DAC arrays is given by the coefficient update of decision-feedback equalisers in high-speed serial links [1].Previous work that implemented dynamic DACs based on floatinggate transistors [2] or current memory cells [3] primarily focused on device mismatch elimination in single DACs [4], rather than on the application of distributed DAC arrays as in our work. The novelty of this work is related to the dynamic operation based on deep-trench capacitors that allow the design of ultra-small DAC array cells.