A Cost-Efficient High-Speed VLSI Architecture for Spiking Convolutional Neural Network Inference Using Time-Step Binary Spike Maps

Zhang, Ling; Yang, Jing; Shi, Cong; Lin, Yun; He, Wei; Zhou, Xichuan; Yang, Xu; Liu, Liyuan; Wu, Nanjian

doi:10.3390/s21186006

Cited by 10 publications

(3 citation statements)

References 42 publications

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“…This paper adopts the original single-bit format to represent the binary spikes. At any discrete timestep t in the digitalized SCNN, the output spikes of all the neurons in one channel of the convolutional layer can be considered a timestep snapshot in the form of a binary map [36]. In this case, the inputcurrent integration phase computation process of the SNNs is almost the same as that of the traditional ANNs except for the additional time dimension and the changed operation.…”

Section: B Dataflow and Parallelism Scheme For Scnnmentioning

confidence: 99%

FireFly: A High-Throughput and Reconfigurable Hardware Accelerator for Spiking Neural Networks

Li¹,

Shen²,

Zhao³

et al. 2023

Preprint

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Spiking neural networks (SNNs) have been widely used due to their strong biological interpretability and high energy efficiency. With the introduction of the backpropagation algorithm and surrogate gradient, the structure of spiking neural networks has become more complex, and the performance gap with artificial neural networks has gradually decreased. However, most SNN hardware implementations for field-programmable gate arrays (FPGAs) cannot meet arithmetic or memory efficiency requirements, which significantly restricts the development of SNNs. They do not delve into the arithmetic operations between the binary spikes and synaptic weights or assume unlimited on-chip RAM resources by using overly expensive devices on small tasks. To improve arithmetic efficiency, we analyze the neural dynamics of spiking neurons, generalize the SNN arithmetic operation to the multiplex-accumulate operation, and propose a high-performance implementation of such operation by utilizing the DSP48E2 hard block in Xilinx Ultrascale FPGAs. To improve memory efficiency, we design a memory system to enable efficient synaptic weights and membrane voltage memory access with reasonable on-chip RAM consumption. Combining the above two improvements, we propose an FPGA accelerator that can process spikes generated by the firing neuron on-the-fly (FireFly). FireFly is implemented on several FPGA edge devices with limited resources but still guarantees a peak performance of 5.53TSOP/s at 300MHz. As a lightweight accelerator, FireFly achieves the highest computational density efficiency compared with existing research using large FPGA devices.

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Section: B Dataflow and Parallelism Scheme For Scnnmentioning

confidence: 99%

FireFly: A High-Throughput and Reconfigurable Hardware Accelerator for Spiking Neural Networks

Li¹,

Shen²,

Zhao³

et al. 2023

Preprint

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show abstract

“…Zhang et al. [ 13 ] propose a scalable, cost-efficient, and high-speed VLSI architecture to accelerate deep spiking convolution neural networks (SCNN). The neuromorphic hardware typically consists of multiple cores and each core can only accommodate a limited number of neurons.…”

Section: Introductionmentioning

confidence: 99%

Optimal Mapping of Spiking Neural Network to Neuromorphic Hardware for Edge-AI

Xiao

Chen

Wang

2022

Sensors

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Neuromorphic hardware, the new generation of non-von Neumann computing system, implements spiking neurons and synapses to spiking neural network (SNN)-based applications. The energy-efficient property makes the neuromorphic hardware suitable for power-constrained environments where sensors and edge nodes of the internet of things (IoT) work. The mapping of SNNs onto neuromorphic hardware is challenging because a non-optimized mapping may result in a high network-on-chip (NoC) latency and energy consumption. In this paper, we propose NeuMap, a simple and fast toolchain, to map SNNs onto the multicore neuromorphic hardware. NeuMap first obtains the communication patterns of an SNN by calculation that simplifies the mapping process. Then, NeuMap exploits localized connections, divides the adjacent layers into a sub-network, and partitions each sub-network into multiple clusters while meeting the hardware resource constraints. Finally, we employ a meta-heuristics algorithm to search for the best cluster-to-core mapping scheme in the reduced searching space. We conduct experiments using six realistic SNN-based applications to evaluate NeuMap and two prior works (SpiNeMap and SNEAP). The experimental results show that, compared to SpiNeMap and SNEAP, NeuMap reduces the average energy consumption by 84% and 17% and has 55% and 12% lower spike latency, respectively.

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“…A research is booming in using LIF spiking networks for online learning 27 , braille letter reading 28 , different neuromorphic synaptic devices 29 for detection and classification of biological problems [30][31][32][33][34][35][36] . Significant research is focused on making human-level control 37 , optimizing back-propagation algorithms for spiking networks [38][39][40] , as well as penetrating much deeper into ARCSes core [41][42][43][44] with smaller number of time steps 41 , using an event-driven paradigm 36,40,45,46 , applying batch normalization 47 , scatter-and-gather optimizations 48 , supervised plasticity 49 , time-step binary maps 50 , and using transfer learning algorithms 51 . In concert with this broad range of software applications, there is a huge amount of research directed at developing and using these LIF SNN in embedded applications with the help of the neuromorphic hardware [52][53][54][55][56][57] , the generic name given to hardware that is nominally based on, or inspired by, the structure and function of the human brain.…”

mentioning

confidence: 99%

Critically synchronized brain waves form an effective, robust and flexible basis for human memory and learning

Galinsky

Frank

2023

Sci Rep

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The effectiveness, robustness, and flexibility of memory and learning constitute the very essence of human natural intelligence, cognition, and consciousness. However, currently accepted views on these subjects have, to date, been put forth without any basis on a true physical theory of how the brain communicates internally via its electrical signals. This lack of a solid theoretical framework has implications not only for our understanding of how the brain works, but also for wide range of computational models developed from the standard orthodox view of brain neuronal organization and brain network derived functioning based on the Hodgkin–Huxley ad-hoc circuit analogies that have produced a multitude of Artificial, Recurrent, Convolution, Spiking, etc., Neural Networks (ARCSe NNs) that have in turn led to the standard algorithms that form the basis of artificial intelligence (AI) and machine learning (ML) methods. Our hypothesis, based upon our recently developed physical model of weakly evanescent brain wave propagation (WETCOW) is that, contrary to the current orthodox model that brain neurons just integrate and fire under accompaniment of slow leaking, they can instead perform much more sophisticated tasks of efficient coherent synchronization/desynchronization guided by the collective influence of propagating nonlinear near critical brain waves, the waves that currently assumed to be nothing but inconsequential subthreshold noise. In this paper we highlight the learning and memory capabilities of our WETCOW framework and then apply it to the specific application of AI/ML and Neural Networks. We demonstrate that the learning inspired by these critically synchronized brain waves is shallow, yet its timing and accuracy outperforms deep ARCSe counterparts on standard test datasets. These results have implications for both our understanding of brain function and for the wide range of AI/ML applications.

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A Cost-Efficient High-Speed VLSI Architecture for Spiking Convolutional Neural Network Inference Using Time-Step Binary Spike Maps

Cited by 10 publications

References 42 publications

FireFly: A High-Throughput and Reconfigurable Hardware Accelerator for Spiking Neural Networks

FireFly: A High-Throughput and Reconfigurable Hardware Accelerator for Spiking Neural Networks

Optimal Mapping of Spiking Neural Network to Neuromorphic Hardware for Edge-AI

Critically synchronized brain waves form an effective, robust and flexible basis for human memory and learning

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