A cost-efficient 28nm split-gate eFLASH memory featuring a HKMG hybrid bit cell and HV device

Richter, Ralf P.; Trentzsch, Martin; Dünkel, Stefan; Müller, Johannes; Moll, P.; Bayha, B.; Mothes, K.; Henke, Anika; Mazur, Martin; Paul, J.; Krottenthaler, P.; Poth, James; Jansen, Sören; Huselitz, Rico; Kim, H.; Zaka, A.; Herrmann, T.; Bazizi, El Mehdi; Beyer, Sven; Ghazavi, P.; Om'mani, H.A.; Lemke, Steven; Tkachev, Yuri; Zhou, Feichi; Kim, J.; Liu, X.; Tiwari, Vipin; Do, Nhan

doi:10.1109/iedm.2018.8614652

Cited by 10 publications

(4 citation statements)

References 4 publications

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“…The SSI mechanism is investigated systematically by means of Synopsys Sentaurus technology computer-aided design (TCAD) simulations, varying the program conditions. All the numerical simulations have been performed fixing the values of the coupling gate voltage (V CG ), bit line voltage (V BL ) and erase gate voltage (V EG ) reported in literature [19][20][21][22][23] for the latest technology node, listed in Table 1 and shown in Figure 2. In particular, the bias conditions are: V CG = HV (>10 V) [19][20][21][22]; word line and commons source voltages (V WL and V CS , respectively) have been varied, respectively, in the range 0.7-1.1 V and 4-4.6 V [20,21,23]; V EG = V CS in order to avoid charge migration between the two electrodes [23]; I BL is fixed at~1 µA [20,24].…”

Section: Methodsmentioning

confidence: 99%

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Influence of Common Source and Word Line Electrodes on Program Operation in SuperFlash Memory

Mazzetta

Irrera

2021

Electronics

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A theoretical study of the influence of word line and common source electrodes on the program operation in shrank SuperFlash memory is proposed. Numerical simulations demonstrate that the literature model defined for previous nodes is not always suitable, due to the continuous cell physical size reduction and to the consequent increment of capacitive coupling between the floating gate and adjacent electrodes. To get a deeper insight, an analytical model of the electric field in the region of source side injection is proposed. This model describes the impact of the cell physical and electrical parameters on the vertical and horizontal field components and highlights the strong dependence of the carrier injection on the technology node. Furthermore, the numerical and analytical models estimate the influence of the word line and common source electrodes on the time-to-program, the floating gate potential and the source side injection efficiency, taking into consideration, at the same time, their possible impact on the cell reliability.

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Section: Methodsmentioning

confidence: 99%

“…In all the simulations, a single 1 s-long pulse is applied on all the electrodes. [19][20][21][22][23].…”

Section: Methodsmentioning

confidence: 99%

Influence of Common Source and Word Line Electrodes on Program Operation in SuperFlash Memory

Mazzetta

Irrera

2021

Electronics

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“…Previous work [ 27 ] proposed using a TiN/SiO 2 tunneling junction‐based resistor integrated in the back end of line (BEOL) and connected with FeFET drain, which is effective but difficult to implement. Another design involves using a split‐gate structure similar to split‐gate embedded FLASH memory, [ 28 ] where a conventional transistor is integrated in series with a FeFET, offering increased flexibility through gate‐tunable series resistance. However, this design complicates the integration processes.…”

Section: Proposal Of 1fefet Cammentioning

confidence: 99%

An Ultracompact Single‐Ferroelectric Field‐Effect Transistor Binary and Multibit Associative Search Engine

Yin

Müller

Huang

et al. 2023

Advanced Intelligent Systems

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Content addressable memory (CAM) is widely used in associative search tasks due to its parallel pattern matching capability. As more complex and data‐intensive tasks emerge, it is becoming increasingly important to enhance CAM density for improved performance and better area efficiency. To reduce the area overheads, various nonvolatile memory (NVM) devices, such as ferroelectric field‐effect transistors (FeFETs), are used in CAM design. Herein, a novel ultracompact 1FeFET CAM design that enables parallel associative search and in‐memory hamming distance calculation is used, as well as a multibit CAM for exact search using the same CAM cell. The proposed CAM design leverages the 1FeFET1R structure, and compact device designs that integrate the series resistor current limiter into the intrinsic FeFET structure are demonstrated to turn the 1FeFET1R structure into an effective 1FeFET cell. A two‐step search operation of the proposed binary and multibit 1FeFET CAM array through both experiments and simulations is proposed, showing a sufficient sensing margin despite unoptimized FeFET device variation. In genome pattern matching applications, using the hyperdimensional computing paradigm, the design results in a 89.9× speedup and 66.5× improvement in energy efficiency over the state‐of‐the‐art alignment tools on GPU.

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“…This approach, though effective, is inconvenient to implement. Another design is to adopt a split-gate structure, similar to the splitgate embedded FLASH memory [23], where a conven-…”

Section: Hfo Based Fefetmentioning

confidence: 99%

An Ultra-Compact Single FeFET Binary and Multi-Bit Associative Search Engine

Yin¹,

Müller²,

Li³

et al. 2022

Preprint

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Content addressable memory (CAM) is widely used in associative search tasks for its highly parallel pattern matching capability. To accommodate the increasingly complex and data-intensive pattern matching tasks, it is critical to keep improving the CAM density to enhance the performance and area efficiency. In this work, we demonstrate: i) a novel ultra-compact 1FeFET CAM design that enables parallel associative search and in-memory hamming distance calculation; ii) a multi-bit CAM for exact search using the same CAM cell; iii) compact device designs that integrate the series resistor current limiter into the intrinsic FeFET structure to turn the 1FeFET1R into an effective 1FeFET cell; iv) a successful 2-step search operation and a sufficient sensing margin of the proposed binary and multi-bit 1FeFET1R CAM array with sizes of practical interests in both experiments and simulations, given the existing unoptimized FeFET device variation; v) 89.9x speedup and 66.5x energy efficiency improvement over the state-of-theart alignment tools on GPU in accelerating genome pattern matching applications through the hyperdimensional computing paradigm.

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A cost-efficient 28nm split-gate eFLASH memory featuring a HKMG hybrid bit cell and HV device

Cited by 10 publications

References 4 publications

Influence of Common Source and Word Line Electrodes on Program Operation in SuperFlash Memory

Influence of Common Source and Word Line Electrodes on Program Operation in SuperFlash Memory

An Ultracompact Single‐Ferroelectric Field‐Effect Transistor Binary and Multibit Associative Search Engine

An Ultra-Compact Single FeFET Binary and Multi-Bit Associative Search Engine

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