2016
DOI: 10.1109/tcsii.2015.2468920
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A Configurable Transmitter Architecture for IEEE 802.11ac and 802.11ad Standards

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Cited by 16 publications
(21 citation statements)
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“…Figure 6.1 shows the block diagram of a digital IQ transmitter featuring a DRFC. The IQ modulator is followed by a Σ∆ noise-shaper and a direct digital-to-RF converter (DRFC) [ [119,41,46]. The choice of architecture, however, depends on the trade-off between in-band resolution and out-of-band emission [92].…”
Section: Digital Iq Transmitter Architecturementioning
confidence: 99%
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“…Figure 6.1 shows the block diagram of a digital IQ transmitter featuring a DRFC. The IQ modulator is followed by a Σ∆ noise-shaper and a direct digital-to-RF converter (DRFC) [ [119,41,46]. The choice of architecture, however, depends on the trade-off between in-band resolution and out-of-band emission [92].…”
Section: Digital Iq Transmitter Architecturementioning
confidence: 99%
“…The choice of architecture, however, depends on the trade-off between in-band resolution and out-of-band emission [92]. A Σ∆ modulator followed by a semi-digital FIR filter as a DRFC is beneficial in WLAN applications where a high in-band resolution digital-to-analog conversion that meets the out-of-band spectrum emission mask can be efficiently implemented [46]. In this work, a novel semi-digital RF DAC implementation is presented.…”
Section: Digital Iq Transmitter Architecturementioning
confidence: 99%
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