A configurable multi-core processor for teaching parallel processing

Udugama, L S K; Geeganage, Janath; Kuruppuarachchi, W. V.

doi:10.1109/iciinfs.2013.6732004

Cited by 4 publications

(1 citation statement)

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“…Tada sumodeliuotas daugiabranduolis procesorius panaudojamas įvykdyti studento parašytą programą, kuri rašoma taikant lygiagrečiojo programavimo principus. Pagal tematiką panašus darbas yra Udugama et al (2013). Čia aprašomas kompiuterių architektūros ir lygiagrečiojo programavimo principams mokyti skirtas daugiabranduolis procesorius.…”

Section: Literatūros Apžvalgaunclassified

Project Design for Computer Architecture Practical Sessions Based on Field-Programmable Gate Array

Bartnykas

2021

Science - Future of Lithuania

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Field-programmable logic arrays are often used in courses on computer architecture. The student must describe the processor with the external components necessary for its operation in the specified HDL (hardware description language) language according to the provided specification during a certain number of projects. The weakness of this approach is that the basis of such projects is a processor of one specific architecture, so the lecturer faces the issue of individualization of projects. This article proposes a solution based on dedicated processors instead of one programmable processor of a specific architecture. It’s shown here that the issue of project individualization is easier solvable in the proposed way, and it does not deviate from the theory of computer architecture, because the programmable processor is a generalization of a dedicated processor. The article describes project design ideas based on dedicated processors and gives some examples. Represented different instance than was applied during practical sessions of Computer Architecture that are held at the Department of Electronic Systems within VILNIUS TECH, i.e. certain modifications, and additions were applied.

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Section: Literatūros Apžvalgaunclassified