A computing-in-memory macro based on three-dimensional resistive random-access memory

Abstract

Non-volatile computing-in-memory macros that are based on two-dimensional arrays of memristors are of use in the development of artificial intelligence edge devices. Scaling such systems to three-dimensional arrays could provide higher parallelism, capacity and density for the necessary vector–matrix multiplication operations. However, scaling to three dimensions is challenging due to manufacturing and device variability issues. Here we report a two-kilobit non-volatile computing-in-memory macro that is based on a three-dimensional vertical resistive random-access memory fabricated using a 55 nm complementary metal–oxide–semiconductor process. Our macro can perform 3D vector–matrix multiplication operations with an energy efficiency of 8.32 tera-operations per second per watt when the input, weight and output data are 8, 9 and 22 bits, respectively, and the bit density is 58.2 bit µm–2. We show that the macro offers more accurate brain MRI edge detection and improved inference accuracy on the CIFAR-10 dataset than conventional methods.

Research progress in architecture and application of RRAM with computing-in-memory

“…The vertical three-dimensional structure combining the graphene plane electrode with a multilayer h-BN insulating dielectric can pave the way toward a new area of ultra-high-density memory integration in the future. Q. Huo et al 28 reported a two-kilobit non-volatile CIM macro based on an eight-layer 3D VRRAM, as shown in Fig. 5(c).…”

Self-powered non-reciprocal phononic logic gates

“…The current mechanical computing system mainly uses a two-dimensional system as the physical base, especially in the volatile system using PnC and acoustic metamaterial. In order to improve the utilization of the mechanical computing space and computing density 45 , the high-order topological insulators 46-49 based on 3D PnC can be used to design the compact mechanical computing system. It is necessary to conduct in-depth exploration of the compilation and design rules of mechanical computing to integrate the sensing, computing and actuating functions of the automatous systems.…”

Sparse matrix multiplication in a record-low power self-rectifying memristor array for scientific computing

“…Owing to its self-rectifying nature, the SRM can substantially outperform other nonvolatile memories, such as the phase-change memory (PCM) and resistive random-access memory (ReRAM), for high-density integration without additional selective devices [4F 2 footprint and prominent three-dimensional (3D) scalability]. Moreover, with their ultralow operating current (down to picoampere level), SRM shows great potential to construct energy-efficient mIMC systems for data-intensive tasks (27)(28)(29)(30)(31)(32)(33). Our SRM cells were fabricated with a vertical stack structure of Pt/HfO 2 /TaO x /Ta (Fig.…”