A compiler-hardware approach to software protection for embedded systems

Dynamic Encryption Key Design and Its Security Evaluation for Memory Data Protection in Embedded Systems

“…Formula (5) shows that without the random number, there are no input collisions if the key sequence length is less than 2 S ct (the counter value space). In this case, the success probability of the used-key attack is 0.…”

A Software Protection Method Based On Computer Fingerprint And Asymmetric Encryption

“…Such as protections based on varied register codes are software techniques [1][2]. Such as protections based on varied softdogs are hardware techniques [3][4][5]. The main principle of these software techniques is to identify whether the user is authority.…”

Evolvable Approaches to Software Verification and Validation

“…We considered two granularities for code block: (a) the cache block and (b) a basic block of code (segment of code between two branch points). These techniques are presented in detail in publications [2,10] and [4] respectively. By operating at the basic block granularity we can deal with program control flow properties that are intrinsic to the application and independent of the architecture specific parameters such as cache block size, and size of cache.…”

“…In addition to exploring the design of the FPGA logic to support the security techniques (discussed in [2,4,10]), complementary uses of FPGA architectures for other secure software applications were also explored. In particular two architectural solutions were devised and tested -(i) processor-memory bus encryption and (ii) network intrusion detection.…”

“…This project combines compiler and architecture techniques to provide a solution that can be built using commercial off the shelf technology (COTS). A system architecture -the Compiler Development Suite for Secure Applications (CODESSEAL) -was designed and its performance was evaluated using a cycle accurate processor simulator (see publications [2,4,7,10]). …”