A comparison of three parallel ΔΣ A/D converters

Eshraghi, A.; Fiez, T.S.

doi:10.1109/iscas.1996.539998

Cited by 8 publications

(10 citation statements)

References 4 publications

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“…The above transfer function simplifies to (5) Using the inverse transform, in (5) can be expanded in terms of (6) Rearranging the above equation, we obtain (7) The term in parenthesis is known as a comb sequence defined as multiple of otherwise.…”

Section: Mathematical Descriptionmentioning

confidence: 99%

A time-interleaved parallel ΔΣD converter

Eshraghi¹,

Fiez

2003

IEEE Trans. Circuits Syst. II

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A new architecture for Nyquist-rate analog-to-digital (A/D) conversion is presented. The new architecture combines the concept of time-interleaved A/D converters with the 16 A/D converter. For every doubling of the clock frequency, the resolution of the A/D converter improves by bits, where is the order of the 16 modulators. The advantage of the time-interleaved 16 A/D converter is reduced complexity of the digital filters. Another feature of this architecture is that the linearity of the converters depends on the linearity of each channel and is independent of the number of channels. Index Terms-Analog-to-digital (A/D) converter, Nyquist rate A/D converter, parallel 16, time interleaved A/D converter.

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Section: Mathematical Descriptionmentioning

confidence: 99%

A time-interleaved parallel ΔΣD converter

Eshraghi¹,

Fiez

2003

IEEE Trans. Circuits Syst. II

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“…Recently, the concept of parallel delta-sigma modulators has been introduced in several studies. A parallel converter uses M modulators working in parallel with each of them running at the same clock frequency [2]. This concept is a satisfactory solution since the signal bandwidth of the converter can be simply extended by adding more branches.…”

Section: A New Methods To Synthesize and Optimize Band-pass Delta-sigmmentioning

confidence: 99%

A new method to synthesize and optimize band-pass delta-sigma modulators

Javidan

Bénabès²

2008

2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference

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An analysis and synthesis method for continuoustime (CT) band-pass delta-sigma modulators, applicable in parallel converters is presented in this paper. This method makes the design of band-pass delta-sigma modulators possible in a wide range of central frequencies and high DAC+ADC delays. This method is also applicable for narrow-band deltasigma converters in order to improve their performances. (Abstract)

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“…High-resolution conversion of wide bandwidth signals may require a circuit speed, which can not be easily accommodated using current technologies [2].…”

Section: Introductionmentioning

confidence: 99%

“…In order to reduce the required OSR to achieve a particular Signal-to-Noise Ratio (SNR) performance, several parallel DeltaSigma (AZ) approaches have been proposed to date offering the potential of extension to high-resolution oversampling noise shaping conversion for signals with higher bandwidths [2]. Among parallel structures, the Time-Division-Multiplexing (TDM) scheme or Time-Interleaving (TI) provides the simplest form of parallelism [2].…”

Section: Introductionmentioning

confidence: 99%

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Time-interleaved delta-sigma modulators using zero-insertion interpolation

Kozak

Kale²

Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)

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AX modulators each operating at a sampling rate of& producing an effective sampling rate of Mfs. ABSTRACTOne way to increase the conversion bandwidth of Delta-Sigma (AE) converters is to exploit the Time-Interleaving technique. In this paper, we propose a novel Time-Interleaving concept based on Zero-insertion Interpolation, which eliminates the high sampling rate multiplexer at the input stage, resulting in a significant simplification in the hardware complexity. In this approach, the input signal is only applied to the first channel whereas all the other channel inputs are fed with zeros at all time. The low-pass filter at the output of the modulator serves two purposes; (i) it rejects the spectral replicas of the input signal arising form Zero-insertion upsampling, (ii) it attenuates the out-of-band quantization noise. The effects of input sampling clock jitter are also studied in this paper.

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A comparison of three parallel ΔΣ A/D converters

Cited by 8 publications

References 4 publications

A time-interleaved parallel ΔΣD converter

A time-interleaved parallel ΔΣD converter

A new method to synthesize and optimize band-pass delta-sigma modulators

Time-interleaved delta-sigma modulators using zero-insertion interpolation

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