A comparison of routing estimation methods for microelectronic modules

Abstract

It is often necessary to estimate the number of board layers in electronic modules before detailed routing is possible. Several methods for estimating board interconnect requirements prior to the existence of a netlist have been developed. Some estimation approaches depend on the use of heuristics derived from studying actually routed designs, while others depend on geometric or statistical arguments. The applicability and uncertainties associated with these estimation techniques are not widely understood. In this paper several different routing estimation methods are applied to a variety of printed wiring board and multichip module applications. The accuracy with which the methods predict the amount of required wiring is compared.

A software tool for estimation of PCB substrate utilisation efficiency statistics from scanned images

“…There are many models that attempt to provide a theoretical or empirical framework to estimate the required area for a printed circuit board (PCB) from features determined very early in the design cycle (Chiba et al , 1996; Guinn and Frye, 1997; Sanborn and Spletter, 1996). All these models can be shown to give adequate results under certain limiting conditions.…”

Material-centric modeling of PWB fabrication: an economic and environmental comparison of conventional and photovia board fabrication processes

“…The length of the holes drilled in the piece is given by hole length fraction area volume of inventory (11) where the (volume of inventory ) is the total volume of the used inventory. This length is not needed to characterize the drilling process, but may be needed to characterize desmear, hole plating, and hole filling operations later.…”

“…Filling of mechanically drilled holes with paste or ink may be an activity in either conventional (subtractive) or in fully additive processes. The amount of material used to fill holes is given by volume hole length area (15) For drilled holes, hole length and area are computed during the drilling operation, (11) and (10). In the case of vias (that are assumed to extend only through the previous layer fabricated), the volume of material used for filling is given by (15) The first term in (16) is the pre-etch volume of the layer in which the channels are to be filled, the second term is the fraction of the layer that is actually channeled, and the third term is the fraction of the panel that is actually board area.…”

“…The wiring is determined from routing estimation methods that predict the total length of wiring necessary to route a specific design based on the number of components, the number of inputs and outputs (I/O), and the number of nets. See [11] for a summary of the methods used to predict application wiring requirements.…”

The Economics of Embedded Passives

“…is the total length of wiring theoretically available in the conventional board ( conv layer W multiplied by the number of layers in the conventional board minus layers on which wiring is not done, e.g., reference planes). Assuming that the total wiring length required is proportional to the total number of system IO that require routing (a fundamental assumption in routing estimation approaches that compare requirements and resources, [11]), f is found from,…”