A Comparison of CNTFET Models through the Design of a SRAM Cell

Abstract

In this paper we present a comparison of CNTFET models through the design of a SRAM cell, in order to identify the one more easily implementable in simulation software. In particular we consider two models, the first, already proposed by us, and the Stanford-Source Virtual Carbon Nanotube Field-Effect Transistor model (VS-CNFET). The simulation results of the design of a SRAM cell structure in CNTFET technology, by using the two models, are shown highlighting the comparison in terms of performance, power dissipation and stability.

Design and implementation of 10T-SRAM cell using Carbon Nano Tube Field Effect Transistor

“…At a certain voltage level, both PMOS and NMOS switch on, resulting in short circuit power dissipation. Since the late 1990s, the study of SEU [4]has grown in popularity among designers of space-based systems. SEU has a significantly greater impact on the highly integrated device.…”

A Simulation Study of Noise Behavior in Basic Current Mirror using CNTFET and MOSFET

“…Among carbon nanotube FETs, for conventional CNTFET [8][9], we have already proposed a compact, semi-empirical model [3][4][5][6][7][8][9][10], implemented both in SPICE and in Verilog-A [11], in order to carry out static and dynamic analysis of A/D circuits [12][13][14][15][16][17][18].…”

Comparative Analysis of CNTFET Models through the Design of a Differential Amplifier

“…For conventional CNTFET (also denoted as C-CNTFET) [8][9], we have already proposed a compact, semi-empirical model [3][4][5][6][7][8][9][10], in which we introduced some improvements to allow an easy implementation both in SPICE and in Verilog-A, to carry out static and dynamic analysis of A/D circuits [12][13][14][15][16][17][18].…”