A Compact Low Power High Frequency Pulse Generator

Abstract

This paper proposes a compact, low power high frequency trigger pulse generator circuit. Delay-introducing circuit that can incorporate a certain amount of delay during signal processing while maintaining the signal integrity is utilized in the proposed design. This paper evaluates performance of various delay-introducing circuits in terms of different design matrices. Further, this paper exploits the low power consuming delay element to implement the proposed trigger pulse generator. The proposed design generates very high frequency pulses at the cost of negligible power consumption. The effectiveness of the proposed circuit is presented by producing ultra-thin pulses of pulse duration 92.35 ps while consuming power of only 1.502 ȝw. Extensive simulations are carried out on SPICE @ 16-nm predictive technology model to verify the proposed design.

Uwb Haberleşme İçi̇n Bi̇r Darbe Üreten Devreni̇n Tasarimi

“…There are several techniques to generate very short pulses in the order of a few nanoseconds or even less. These techniques are based on the propagation delay characteristics of digital logic gates [1][2][3], step-recovery diodes [4][5][6][7], step-recovery effect of transistors [8], and avalanche effect of transistors [9][10]. Pulse generation using digital logic gates has not been considered since the generated pulse width is about 5 ns when HC series CMOS logic gates are used [11].…”