A commercial multithreaded RISC processor

Storino, S.N.; Aipperspach, A.; Borkenhagen, John M.; Eickemeyer, Richard J.; Kunkel, S.; Levenstein, S.; Uhlmann, G.

doi:10.1109/isscc.1998.672449

Cited by 21 publications

(9 citation statements)

References 2 publications

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“…Chip-multithread (CMT) [8] processors aim to solve the problem from another point of view: they run different processes at the same time, assigning them resources dynamically according to the available resources and requirements. Historically the first CMT processor was a coarse-grained multithreading CPU (IBM RS64-II [9,10]) introduced in 1998: in this kind of processor only one thread executes at any instance. Whenever that thread experiments a long-latency delay (such as a cache miss), the processor swaps out the waiting thread and starts to execute the second thread.…”

Section: Multiprocessor-embedded Systemsmentioning

confidence: 99%

Hard Real-Time Performances in Multiprocessor-Embedded Systems Using ASMP-Linux

Betti¹,

Bovet²,

Cesati³

et al. 2008

EURASIP Journal on Embedded Systems

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Multiprocessor systems, especially those based on multicore or multithreaded processors, and new operating system architectures can satisfy the ever increasing computational requirements of embedded systems. ASMP-LINUX is a modified, high responsiveness, open-source hard real-time operating system for multiprocessor systems capable of providing high real-time performance while maintaining the code simple and not impacting on the performances of the rest of the system. Moreover, ASMP-LINUX does not require code changing or application recompiling/relinking. In order to assess the performances of ASMP-LINUX, benchmarks have been performed on several hardware platforms and configurations.

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Section: Multiprocessor-embedded Systemsmentioning

confidence: 99%

Hard Real-Time Performances in Multiprocessor-Embedded Systems Using ASMP-Linux

Betti¹,

Bovet²,

Cesati³

et al. 2008

EURASIP Journal on Embedded Systems

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“…We propose a new way of implementing concurrent reference counting by exploiting two observations: Coarse-grain Multithreading (where multiple threads of execution share a processor but only one is being executed in a given cycle, this differs from traditional multiprogramming in that there is hardware support for extremely fast contextswitch time e.g., IBM RS64-II/III [23,24] arid Sun MAJC). All of these techniques give software the opportunity to implement closely-coupled threads cheaply by exploiting fast on-chip cominunication, as opposed to a typical shared multi-processor architecture where communication between processors is comparatively expensive.…”

Section: Introductionmentioning

confidence: 99%

Concurrent garbage collection using program slices on multithreaded processors

Plakal

Fischer

2000

Proceedings of the 2nd International Symposium on Memory Management

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We investigate reference counting in the context of a multithreaded architecture by exploiting two observations: (1) reference-counting can be performed by a transformed program slice of the mutator that isolates heap references, and (2) hardware trends indicate that microprocessors in the near future will be able to execute multiple concurrent threads on a single chip. We generate a reference-counting collector as a transsformed program slice of an application and then execute this slice in parallel with the application as a "run-behind" thread. Preliminary measurements of collector overheads are quite encouraging, showing a 25% to 53% space overhead to transfer garbage collection to a separate thread.

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“…(CMP, which is essentially a small-scale shared-memory multiprocessor on a single chip e.g., IBM Power4 [7,14], Sun MAJC [25], Compaq Piranha [1], NEC MP98 [11]) or Coarse-grain Multithreading (where multiple threads of execution share a processor but only one is being executed in a given cycle, this differs from traditional multiprogramming in that there is hardware support for extremely fast contextswitch time e.g., IBM RS64-II/III [23,24] arid Sun MAJC). All of these techniques give software the opportunity to implement closely-coupled threads cheaply by exploiting fast on-chip cominunication, as opposed to a typical shared multi-processor architecture where communication between processors is comparatively expensive.…”

Section: Introductionmentioning

confidence: 99%